RC82562EP Intel, RC82562EP Datasheet - Page 172

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RC82562EP

Manufacturer Part Number
RC82562EP
Description
IC ETH 10/100 PLC DEV CTRL 64BGA
Manufacturer
Intel
Datasheets

Specifications of RC82562EP

Rohs Status
RoHS non-compliant
Controller Type
Ethernet Controller
Interface
IEEE 802.3
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Package / Case
64-BGA
Current - Supply
-
Operating Temperature
-
Other names
832361

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
RC82562EP
Manufacturer:
Intel
Quantity:
10 000
82550 and 82551 Specific Information
B.3.4.5
B.3.5
B.3.5.1
B.3.5.2
B.3.5.3
B.4
B.4.1
164
way, it may read an extra TBD (or 8 bytes) after the last valid TBD. The driver is responsible for
allocating enough memory for the TBD array. Otherwise, it needs to ensure that an extra 8 byte
read access from the PCI will not affect anything.
Performance Considerations
For better performance, the maximum TCP payload should be a multiple of 4. It is recommended
to use the largest possible value for this parameter.
Features Co-existence
Large Send and Checksum
Large Send and checksum are orthogonal.
Large Send and Software Parsing
Large Send cannot be used with software parsing.
Large Send and Scheduling Assist
All frames of one Large Send instance are subject to the same scheduling policy. Specifically, if the
prototype has a time value for transmission, all subsequent frames are considered ready for
transmission after that time and may be transmitted back-to-back.
RCV Checksum Processing
The 82550 and 82551 compute and verify the IP header checksum and the TCP/UDP checksum on
frames successfully parsed. It indicates a checksum match or mismatch in the RFD. An incoming
UDP frame with a checksum field of 0 is treated as a checksum match. If the 82550 or 82551
cannot decrypt a frame, the checksum can only be verified to the first IP header only (relevant to
types IV, V, and VI).
Data Flow
In checksum modes, the device checks incoming frames for format correctness. If the check fails, a
receive parser failure occurs and the frame is passed as is. The incoming frame is subject to all
MAC layer checks (for example, CRC, minimum length, address filtering). If the value of the word
following the DA and SA fields is less than 5DCh (1500), the controller assumes it is an Ethernet
v2 frame. If the word value is greater than or equal to 5DCh (1500), the 82550 and 82551 compare
in the incoming frame format to SNAP.
In the 82559 compatibility mode, incoming frames are not verified for their format. The checksum
is calculated on all non-MAC frame bytes. Supported frame formats are Ethernet v2 and SNAP.
10/100 Mbps Ethernet Controller Family Open Source Software Developer Manual

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