ISP1505CBSGE ST-Ericsson Inc, ISP1505CBSGE Datasheet - Page 71

• Manufacturer Part Number: ISP1505CBSGE
• Description: IC ULPI TRANSCEIVER 24-HVQFN
• Manufacturer: ST-Ericsson Inc
• Type: Transceiverr

Specifications of ISP1505CBSGE

• Protocol: USB 2.0
• Voltage - Supply: 3 V ~ 4.5 V
• Mounting Type: Surface Mount
• Package / Case: 24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
• For Use With: ISP1505CBS T&MT KIT - EVAL KIT FOR ISP1505 IC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Other names: ISP1505CBS; ISP1505CBS

NXP Semiconductors
21. Revision history
Table 58.
ISP1505A_ISP1505C_3
Product data sheet
Document ID
ISP1505A_ISP1505C_3
Modifications:
ISP1505A_ISP1505C_2
Modifications:
ISP1505A_ISP1505C_1
Revision history
Release date
20080826
20070913
20061019
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Changed On-The-Go Supplement to the USB 2.0 Specification from Rev. 1.2 to Rev. 1.3.
Section 2
Section 8.2 “USB and OTG state
Section “OTG
Section 9.10.1 “Full-speed and low-speed host-initiated suspend and
second list item.
Section 9.10.2 “High-speed suspend and
Table 41 “Power Control register (address R = 3Dh to 3Fh, W = 3Dh, S = 3Eh, C = 3Fh) bit
description”: updated description for bits 3 and 2.
Removed reference to input clock mode from the following sections:
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Section 9.4.2 “Fault detection”: updated.
Section “Standard USB host controllers”: updated the first list item.
Section 10.2 “Extended register set”: updated the second paragraph.
Table 42 “Limiting values”: added V
Table 51 “Dynamic characteristics: reset and clock”: added
Table 52 “Dynamic characteristics: digital I/O pins”: updated.
Section 16 “Application information”: updated.
Section 2 “Features”
Section 5 “Block diagram”
Table 2 “Pin description”
Section 7.5 “Crystal oscillator and PLL”
Section 7.10.2 “V
Section 7.10.8 “XTAL1 and XTAL2”
Section 7.10.13 “CLOCK”
Table 3 “ULPI signal description”
Section 9.3 “Power-up, reset and bus idle sequence”
Table 42 “Limiting values”
Table 43 “Recommended operating conditions”
Table 45 “Static characteristics: digital pins (CLOCK, DIR, STP, NXT, DATA[7:0],
RESET_N/PSW_N)”
Table 51 “Dynamic characteristics: reset and clock”
Table 52 “Dynamic characteristics: digital I/O pins”
Section 16 “Application information”
“Features”: updated.
Data sheet status
Product data sheet
Product data sheet
Product data sheet
devices”: updated the last sentence.
Rev. 03 — 26 August 2008
CC(I/O)
”
transitions”: updated the first sentence.
I
on the DP and DM pins, and added Table note 1.
ULPI HS USB host and peripheral transceiver
resume”: updated the second list item.
ISP1505A; ISP1505C
Change notice
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-
-
i(XTAL1)
Supersedes
ISP1505A_ISP1505C_2
ISP1505A_ISP1505C_1
-
and Table note 1.
resume”: updated the
© NXP B.V. 2008. All rights reserved.
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