MT47H512M8WTR-3:C Micron Technology Inc, MT47H512M8WTR-3:C Datasheet

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MT47H512M8WTR-3:C

Manufacturer Part Number
MT47H512M8WTR-3:C
Description
IC DDR2 SDRAM 4GBIT 63FBGA
Manufacturer
Micron Technology Inc
Series
-r
Datasheet

Specifications of MT47H512M8WTR-3:C

Format - Memory
RAM
Memory Type
DDR2 SDRAM
Memory Size
4G (512M x 8)
Speed
3ns
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 85°C
Package / Case
63-TFBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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TwinDie™ DDR2 SDRAM
MT47H1G4 – 64 Meg x 4 x 8 Banks x 2 Ranks
MT47H512M8 – 32 Meg x 8 x 8 Banks x 2 Ranks
Features
Functionality
The 4Gb (TwinDie™) DDR2 SDRAM uses Micron’s
2Gb DDR2 monolithic die and has similar functionali-
ty. This TwinDie data sheet is intended to provide a
general description, package dimensions, and the ball-
out only. Refer to Micron's 2Gb DDR2 data sheet for
complete information or for specifications not inclu-
ded in this document.
Table 1: Key Timing Parameters
Table 2: Addressing
PDF: 09005aef8227ee4d
mt47h1g_64m_32m_twindie.pdf - Rev. H 04/11 EN
• Uses 2Gb Micron die
• Two ranks (includes dual CS#, ODT, and CKE balls)
• Each rank has 8 internal banks for concurrent oper-
• V
• JEDEC-standard 63-ball FBGA
• Low-profile package – 1.35mm MAX thickness
Parameter
Configuration
Refresh count
Row address
Bank address
Column address
Speed
Grade
ation
-37E
DD
-25
-3
= V
DDQ
CL = 3
400
400
400
= +1.8V ±0.1V
Products and specifications discussed herein are subject to change by Micron without notice.
Data Rate (MT/s)
CL = 4
533
533
533
CL = 5
667
667
n/a
CL = 6
64 Meg x 4 x 8 banks x 2 ranks
800
n/a
n/a
A[11, 9:0] (2K)
A[14:0] (32K)
BA[2:0] (8)
1 Gig x 4
t
RCD (ns)
8K
1
15
15
15
Options
• Configuration
• FBGA package (Pb-free)
• Timing – cycle time
• Self refresh
• Operating temperature
• Revision
– 64 Meg x 4 x 8 banks x 2 ranks
– 32 Meg x 8 x 8 banks x 2 ranks
– 63-ball FBGA (12mm x 14mm) Rev. A
– 63-ball FBGA (9mm x 11.5mm) Rev. C
– 2.5ns @ CL = 6 (DDR2-800)
– 3.0ns @ CL = 5 (DDR2-667)
– 3.75ns @ CL = 4 (DDR2-533)
– Standard
– Commercial (0°C ≤ T
Note:
Micron Technology, Inc. reserves the right to change products or specifications without notice.
4Gb: x4, x8 TwinDie DDR2 SDRAM
1. CL = CAS (READ) latency.
t
RP (ns)
15
15
15
32 Meg x 8 x 8 banks x 2 ranks
1
C
t
RC (ns)
≤ 85°C)
© 2006 Micron Technology, Inc. All rights reserved.
512 Meg x 8
55
55
55
A[14:0] (32K)
BA[2:0] (8)
A[9:0] (1K)
8K
t
Features
Marking
RFC (ns)
197.5
197.5
197.5
512M8
None
None
THM
:A/:C
WTR
-37E
1G4
-25
-3

Related parts for MT47H512M8WTR-3:C

MT47H512M8WTR-3:C Summary of contents

Page 1

TwinDie™ DDR2 SDRAM MT47H1G4 – 64 Meg Banks x 2 Ranks MT47H512M8 – 32 Meg Banks x 2 Ranks Features • Uses 2Gb Micron die • Two ranks (includes dual CS#, ODT, ...

Page 2

Ball Assignments and Descriptions Figure 1: 63-Ball FBGA – x4, x8 Ball Assignments (Top View NF, NU/RDQS NF, DQ6 C V DDQ D NF, DQ4 E V DDL F G BA2 H CKE1 J V ...

Page 3

... Address inputs: Provide the row address for ACTIVATE commands, and the column ad- dress and auto precharge bit (A10) for READ/WRITE commands, to select one location out of the memory array in the respective bank. A10 sampled during a PRECHARGE com- mand determines whether the PRECHARGE applies to one bank (A10 LOW, bank selected by BA[2:0]) or all banks (A10 HIGH) ...

Page 4

Table 3: FBGA 63-Ball Descriptions (Continued) Symbol Type Description RDQS, RDQS# I/O Redundant data strobe: For the x8 configuration only. RDQS is enabled/disabled via the load mode command to the extended mode register (EMR). When RDQS is enabled, RDQS is ...

Page 5

Functional Description The 4Gb (TwinDie) DDR2 SDRAM is a high-speed, CMOS dynamic random access mem- ory device containing 4,294,967,296 bits and internally configured as two 8-bank 2Gb DDR2 SDRAM devices. Although each die is tested individually within the dual-die package, ...

Page 6

Functional Block Diagrams Figure 2: 64 Meg Banks x 2 Ranks CS1# RAS# CKE1 CAS# ODT1 WE# PDF: 09005aef8227ee4d mt47h1g_64m_32m_twindie.pdf - Rev. H 04/11 EN 4Gb: x4, x8 TwinDie DDR2 SDRAM Rank 1 (64 Meg x ...

Page 7

Figure 3: 32 Meg Banks x 2 Ranks CS1# RAS# CKE1 CAS# ODT1 WE# PDF: 09005aef8227ee4d mt47h1g_64m_32m_twindie.pdf - Rev. H 04/11 EN 4Gb: x4, x8 TwinDie DDR2 SDRAM Rank 1 (32 Meg ...

Page 8

Electrical Specifications – Absolute Ratings Stresses greater than those listed may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other condi- tions oustide those indicated in ...

Page 9

Table 5: Temperature Limits Parameter Storage temperature Operating temperature: commercial Notes: 1. MAX storage case temperature T 2. MAX operating case temperature T 3. Device functionality is not guaranteed if the device exceeds maximum T Figure 4: Example Temperature Test ...

Page 10

Electrical Specifications – I Table 7: DDR2 I Specifications and Conditions (Die Revision A) DD Notes: 1–8 apply to the entire table Parameter/Condition Operating one bank active-precharge current ...

Page 11

Table 7: DDR2 I Specifications and Conditions (Die Revision A) (Continued) DD Notes: 1–8 apply to the entire table Parameter/Condition Operating burst read current: All banks open, continu- ous burst reads, Iout = 0mA ...

Page 12

Table 8: DDR2 I Specifications and Conditions (Die Revision C) DD Notes: 1–8 apply to the entire table Parameter/Condition Operating one bank active-precharge current RAS = RAS MIN (I ...

Page 13

Table 8: DDR2 I Specifications and Conditions (Die Revision C) (Continued) DD Notes: 1–8 apply to the entire table Parameter/Condition Operating burst read current: All banks open, continuous burst reads, Iout = 0mA ...

Page 14

PDF: 09005aef8227ee4d mt47h1g_64m_32m_twindie.pdf - Rev. H 04/11 EN Electrical Specifications – I When I and I must be derated by 4%; I DD2P DD3P(SLOW) ≤ 0° 2%; and I and I T DD6 C When ...

Page 15

Package Dimensions Figure 5: 63-Ball FBGA (12mm x 14mm) (THM) Seating plane A 0.12 A 63X Ø0.45 Solder ball material: SAC305. Dimensions apply solder balls post-reflow on Ø0.33 NSMD ball pads. 8 CTR 0.8 TYP 0.8 ...

Page 16

Figure 6: 63-Ball FBGA (9mm x 11.5mm) (WTR) Seating plane A 0.12 A 63X Ø0.45 Solder ball material: SAC305. Dimensions apply to solder balls post-reflow on Ø0.33 NSMD ball pads. 8 CTR 0.8 TYP 0.8 TYP 6.4 ...

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