MT47H512M8WTR-3:C Micron Technology Inc, MT47H512M8WTR-3:C Datasheet - Page 5

• Manufacturer Part Number: MT47H512M8WTR-3:C
• Description: IC DDR2 SDRAM 4GBIT 63FBGA
• Manufacturer: Micron Technology Inc
• Series: -r

Specifications of MT47H512M8WTR-3:C

• Format - Memory: RAM
• Memory Type: DDR2 SDRAM
• Memory Size: 4G (512M x 8)
• Speed: 3ns
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 63-TFBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Functional Description
PDF: 09005aef8227ee4d
mt47h1g_64m_32m_twindie.pdf - Rev. H 04/11 EN
The 4Gb (TwinDie) DDR2 SDRAM is a high-speed, CMOS dynamic random access mem-
ory device containing 4,294,967,296 bits and internally configured as two 8-bank 2Gb
DDR2 SDRAM devices.
Although each die is tested individually within the dual-die package, some TwinDie test
results may vary from a like-die tested within a monolithic die package.
Each DDR2 SDRAM die uses a double data rate architecture to achieve high-speed oper-
ation. The DDR2 architecture is essentially a 4n-prefetch architecture, with an interface
designed to transfer two data words per clock cycle at the I/O balls. A single read or
write access consists of a single 4n-bit-wide, one-clock-cycle data transfer at the inter-
nal DRAM core and four corresponding n-bit-wide, one-half-clock-cycle data transfers
at the I/O balls.
Addressing of the TwinDie is identical to the monolithic device. Additionally, multiple
chip selects select the desired rank.
This TwinDie data sheet is intended to provide a general description, package dimen-
sions, and the ballout only. Refer to the Micron 2Gb DDR2 data sheet for complete
information regarding individual die initialization, register definition, command descrip-
tions, and die operation.
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Micron Technology, Inc. reserves the right to change products or specifications without notice.
4Gb: x4, x8 TwinDie DDR2 SDRAM
Functional Description
© 2006 Micron Technology, Inc. All rights reserved.