PEB2256H-V12 Infineon Technologies, PEB2256H-V12 Datasheet - Page 424

• Manufacturer Part Number: PEB2256H-V12
• Description: IC INTERFACE LINE 3.3V 80-MQFP
• Manufacturer: Infineon Technologies

Specifications of PEB2256H-V12

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 80-SQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB2256H-V12; PEB2256H-V12IN

Signaling Status Register (Read)
SIS
XDOV
XFW
XREP
IVB
RLI
CEC
SFS
Data Sheet
XDOV
7
Transmit Data Overflow - HDLC Channel 1
More than 32 bytes have been written to the XFIFO.
This bit is reset
– by a transmitter reset command XRES or
– when all bytes in the accessible half of the XFIFO have been moved
Transmit FIFO Write Enable - HDLC Channel 1
Data can be written to the XFIFO.
Transmission Repeat - HDLC Channel 1
Status indication of CMDR.XREP.
Invalid BOM Frame Received - HDLC Channel 1
0
1
Receive Line Inactive - HDLC Channel 1
Neither flags as interframe time fill nor frames are received in the
signaling time slot.
Command Executing
0
1
Note: CEC is active at most 2.5 periods of the current system data
Status Freeze Signaling
0 =
1 =
XFW
in the inaccessible half.
Valid BOM frame (11111111, 0xxxxxx0) received.
Invalid BOM frame received.
No command is currently executed, the CMDR register can be
written to.
A command (written previously to CMDR) is currently executed,
no further command can be temporarily written in CMDR
register.
rate.
Freeze signaling status inactive.
Freeze signaling status active.
XREP
IVB
424
RLI
CEC
SFS
T1/J1 Registers
FALC56 V1.2
BOM
0
PEB 2256
2002-08-27
(64)