PEB2256H-V12 Infineon Technologies, PEB2256H-V12 Datasheet - Page 47

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PEB2256H-V12

Manufacturer Part Number
PEB2256H-V12
Description
IC INTERFACE LINE 3.3V 80-MQFP
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEB2256H-V12

Applications
*
Interface
*
Voltage - Supply
*
Package / Case
80-SQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB2256H-V12
PEB2256H-V12IN

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PEB2256H-V12
Manufacturer:
Infineon Technologies
Quantity:
10 000
Table 4
Pin
No.
60
61
62
63
Data Sheet
Ball
No.
B8
A9
A8
B7
Pin Definitions - System Interface (cont’d)
Symbol
XPA
XPB
XPC
XPD
Input (I)
Output (O)
Supply (S)
O
O
I + PU
Function
Data Link Bit Transmit (DLX)
PC(1:4).XPC(3:0) = 0110
E1: Marks the S
stream on XDI. The S
slot 0 of every frame not containing the frame
alignment signal are selected by register
XC0.SA8E to XC0.SA4E.
T1/J1: This output provides a 4-kHz signal
which marks the DL-bit position within the data
stream on XDI (in ESF mode only).
Transmit Clock (XCLK)
PC(1:4).XPC(3:0) = 0111
Transmit line clock of 2.048 MHz (E1) or
1.544 MHz (T1/J1) derived from SCLKX/R,
RCLK or generated internally by DCO
circuitries.
Transmit Line Tristate (XLT)
PC(1:4).XPC(3:0) = 1000
A high level on this port sets the transmit lines
XL1/2 or XDOP/N into tristate mode. This pin
function is logically ored with register bit
XPM2.XLT.
47
a
(8:4)-bits within the data
a
(8:4)-bit positions in time
Pin Descriptions
FALC56 V1.2
PEB 2256
2002-08-27

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