M25P10-AVMN6TP Micron Technology Inc, M25P10-AVMN6TP Datasheet - Page 11

• Manufacturer Part Number: M25P10-AVMN6TP
• Manufacturer: Micron Technology Inc

Specifications of M25P10-AVMN6TP

• Lead Free Status / Rohs Status: Compliant

MEMORY ORGANIZATION
The memory is organized as:
Each page can be individually programmed (bits
are programmed from 1 to 0). The device is Sector
or Bulk Erasable (bits are erased from 0 to 1) but
not Page Erasable.
Figure 7. Block Diagram
HOLD
131,072 bytes (8 bits each)
4 sectors (256 Kbits, 32768 bytes each)
512 pages (256 bytes each).
W
Q
S
C
D
Address Register
Control Logic
and Counter
18000h
10000h
08000h
00000h
I/O Shift Register
256 Bytes (Page Size)
High Voltage
Generator
X Decoder
Data Buffer
256 Byte
Table 3. Memory Organization
Sector
3
2
1
0
1FFFFh
000FFh
18000h
10000h
08000h
00000h
Address Range
Register
Status
memory area
Size of the
read-only
1FFFFh
0FFFFh
17FFFh
07FFFh
M25P10-A
AI03747D
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