M25P10-AVMN6TP Micron Technology Inc, M25P10-AVMN6TP Datasheet - Page 16

• Manufacturer Part Number: M25P10-AVMN6TP
• Manufacturer: Micron Technology Inc

Specifications of M25P10-AVMN6TP

• Lead Free Status / Rohs Status: Compliant

M25P10-A
Table 6. Protection Modes
Note: 1. As defined by the values in the Block Protect (BP1, BP0) bits of the Status Register, as shown in Table 2.
The protection features of the device are summa-
rized in Table 6.
When the Status Register Write Disable (SRWD)
bit of the Status Register is 0 (its initial delivery
state), it is possible to write to the Status Register
provided that the Write Enable Latch (WEL) bit has
previously been set by a Write Enable (WREN) in-
struction, regardless of the whether Write Protect
(W) is driven High or Low.
When the Status Register Write Disable (SRWD)
bit of the Status Register is set to 1, two cases
need to be considered, depending on the state of
Write Protect (W):
– If Write Protect (W) is driven High, it is possible
– If Write Protect (W) is driven Low, it is not pos-
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Signal
to write to the Status Register provided that the
Write Enable Latch (WEL) bit has previously
been set by a Write Enable (WREN) instruction.
sible to write to the Status Register even if the
Write Enable Latch (WEL) bit has previously
been set by a Write Enable (WREN) instruction.
(Attempts to write to the Status Register are re-
W
1
0
1
0
SRWD
Bit
0
0
1
1
Protected
Hardware
Protected
Software
(SPM)
(HPM)
Mode
Status Register is
Writable (if the WREN
instruction has set the
WEL bit)
The values in the SRWD,
BP1 and BP0 bits can be
changed
Status Register is
Hardware write protected
The values in the SRWD,
BP1 and BP0 bits cannot
be changed
Write Protection of the
Status Register
Regardless of the order of the two events, the
Hardware Protected Mode (HPM) can be entered:
– by setting the Status Register Write Disable
– or by driving Write Protect (W) Low after setting
The only way to exit the Hardware Protected Mode
(HPM) once entered is to pull Write Protect (W)
High.
If Write Protect (W) is permanently tied High, the
Hardware Protected Mode (HPM) can never be
activated, and only the Software Protected Mode
(SPM), using the Block Protect (BP1, BP0) bits of
the Status Register, can be used.
Protected against Page
Program, Sector Erase
and Bulk Erase
Protected against Page
Program, Sector Erase
and Bulk Erase
jected, and are not accepted for execution). As
a consequence, all the data bytes in the memo-
ry area that are software protected (SPM) by the
Block Protect (BP1, BP0) bits of the Status Reg-
ister, are also hardware protected against data
modification.
(SRWD) bit after driving Write Protect (W) Low
the Status Register Write Disable (SRWD) bit.
Protected Area
Memory Content
1
Ready to accept Page
Program and Sector
Erase instructions
Ready to accept Page
Program and Sector
Erase instructions
Unprotected Area
1