M25P10-AVMN6TP Micron Technology Inc, M25P10-AVMN6TP Datasheet - Page 18

• Manufacturer Part Number: M25P10-AVMN6TP
• Manufacturer: Micron Technology Inc

Specifications of M25P10-AVMN6TP

• Lead Free Status / Rohs Status: Compliant

M25P10-A
Figure 13. Read Data Bytes at Higher Speed (FAST_READ) Instruction Sequence and Data-Out
Sequence
Note: 1. Address bits A23 to A17 are Don’t Care.
Read Data Bytes at Higher Speed
(FAST_READ)
The device is first selected by driving Chip Select
(S) Low. The instruction code for the Read Data
Bytes at Higher Speed (FAST_READ) instruction
is followed by a 3-byte address (A23-A0) and a
dummy byte, each bit being latched-in during the
rising edge of Serial Clock (C). Then the memory
contents, at that address, is shifted out on Serial
Data Output (Q), each bit being shifted out, at a
maximum frequency f
Serial Clock (C).
The instruction sequence is shown in Figure 13.
The first byte addressed can be at any location.
The address is automatically incremented to the
18/38
S
C
D
Q
S
C
D
Q
0
7
32 33 34
1
High Impedance
C
6
2
, during the falling edge of
Instruction
Dummy Byte
5
3
4
35
4
3
5
36 37 38 39 40 41 42 43 44 45 46
2
6
1
7
23
0
8
MSB
22 21
7
9 10
24 BIT ADDRESS
6
DATA OUT 1
5
3
28 29 30 31
4
2
3
next higher address after each byte of data is shift-
ed out. The whole memory can, therefore, be read
with a single Read Data Bytes at Higher Speed
(FAST_READ) instruction. When the highest ad-
dress is reached, the address counter rolls over to
000000h, allowing the read sequence to be contin-
ued indefinitely.
The
(FAST_READ) instruction is terminated by driving
Chip Select (S) High. Chip Select (S) can be driv-
en High at any time during data output. Any Read
Data Bytes at Higher Speed (FAST_READ) in-
struction, while an Erase, Program or Write cycle
is in progress, is rejected without having any ef-
fects on the cycle that is in progress.
1
2
0
1
Read
0
47
MSB
7
6
Data
DATA OUT 2
5
4
Bytes
3
2
1
at
0
MSB
Higher
7
AI04006
Speed