M25P10-AVMN6TP Micron Technology Inc, M25P10-AVMN6TP Datasheet - Page 25

• Manufacturer Part Number: M25P10-AVMN6TP
• Manufacturer: Micron Technology Inc

Specifications of M25P10-AVMN6TP

• Lead Free Status / Rohs Status: Compliant

POWER-UP AND POWER-DOWN
At Power-up and Power-down, the device must
not be selected (that is Chip Select (S) must follow
the voltage applied on V
correct value:
– V
– V
Usually a simple pull-up resistor on Chip Select (S)
can be used to insure safe and proper Power-up
and Power-down.
To avoid data corruption and inadvertent write
operations during power up, a Power On Reset
(POR) circuit is included. The logic inside the
device is held reset while V
threshold value, V
and the device does not respond to any
instruction.
Moreover, the device ignores all Write Enable
(WREN), Page Program (PP), Sector Erase (SE),
Bulk Erase (BE) and Write Status Register
(WRSR) instructions until a time delay of t
elapsed after the moment that V
V
the device is not guaranteed if, by this time, V
still below V
Program or Erase instructions should be sent until
the later of:
Figure 20. Power-up Timing
WI
lay of t
CC
SS
threshold. However, the correct operation of
V CC (max)
V CC (min)
(min) at Power-up, and then for a further de-
at Power-down
VSL
V WI
V CC
CC
(min). No Write Status Register,
Reset State
WI
Device
of the
– all operations are disabled,
Program, Erase and Write Commands are Rejected by the Device
CC
CC
Chip Selection Not Allowed
) until V
is less than the POR
CC
CC
rises above the
reaches the
PUW
CC
has
is
tPUW
tVSL
– t
– t
These values are specified in Table 7.
If the delay, t
above V
READ instructions even if the t
fully elapsed.
At Power-up, the device is in the following state:
– The device is in the Standby mode (not the
– The Write Enable Latch (WEL) bit is reset.
Normal precautions must be taken for supply rail
decoupling, to stablise the V
in a system should have the V
a suitable capacitor close to the package pins.
(Generally, this capacitor is of the order of 0.1µF).
At Power-down, when V
operating voltage, to below the POR threshold
value, V
device does not respond to any instruction. (The
designer needs to be aware that if a Power-down
occurs while a Write, Program or Erase cycle is in
progress, some data corruption can result.)
Deep Power-down mode).
PUW
VSL
Read Access allowed
afterV
after V
CC
WI
, all operations are disabled and the
(min), the device can be selected for
VSL
CC
CC
, has elapsed, after V
passed the V
passed the V
Device fully
accessible
CC
CC
CC
CC
PUW
WI
feed. Each device
(min) level
drops from the
time
rail decoupled by
threshold
delay is not yet
CC
M25P10-A
AI04009C
has risen
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