ST72T774J9B1 STMicroelectronics, ST72T774J9B1 Datasheet - Page 63

• Manufacturer Part Number: ST72T774J9B1
• Manufacturer: STMicroelectronics

Specifications of ST72T774J9B1

• Cpu Family: ST7
• Device Core Size: 8b
• Frequency (max): 24MHz
• Interface Type: I2C/USB
• Program Memory Type: EPROM
• Program Memory Size: 60KB
• Total Internal Ram Size: 1KB
• # I/os (max): 31
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4V
• On-chip Adc: 1-chx8-bit
• On-chip Dac: 1-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 42
• Package Type: SPDIP
• Lead Free Status / Rohs Status: Specific Sites Compliant

SYNC PROCESSOR (SYNC) (Cont’d)
4.4.6.5 Example of VSYNCO extraction for a
negative composite sync with serration pulses
Refer to
In extraction mode, the 5-bit comparator checks
the counter value with respect to the threshold.
When the incoming signal is high, the counter is
increased, otherwise it is decreased.
When the counter reaches the threshold on its way
down, VSYNCO is asserted. During the vertical
blanking, the counter value is decreased down to a
programmable minimum, i.e. it does not underflow.
Figure 43. VSYNCO Extraction from a Composite Signal (negative polarity)
Figure 44. Obtaining the 11-bit Vertical Period (V11BITS)
Composite signal
8µs
VGENR
Counter value:
Figure
generated
Threshold
HSYNCO
VSYNCO
1F=Max
0=Min
7
Input
43.
V11BITS
10
0
CFGR
7
Max Delay: 8µs
or threshold
When the vertical period is finished, the counter
starts counting up and when the maximum is
reached, VSYNCO is negated. The extracted
signal may be validated by software since it is input
to Timer ICAP1.
Serration pulses during vertical blanking can be
filtered if the serration pulse widths are less than
8µs.
In the same way, positive composite sync signals
can be used by properly selecting the edge
sensitivity in HSYNCI width measurement mode
(LCV0 bit).
0
Q’2 Q’1 Q’0
Max Pulse width: 8µs
1F-Threshold
Serration pulses
0
VSYNCO Pulse
ST72774/ST727754/ST72734
Example:
VGENR=CCh, CFGR = 3h
V11bits=663h
VR01990
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