UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 131

• Manufacturer Part Number: UPD78F0988AGC-8BS
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0988AGC-8BS

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Value loaded
Value loaded
(4) Pulse width measurement by means of restart
Count clock
count value
INTTM01n
to CR01n
to CR00n
pin input
OVF0n
Remark n = 0, 1
When input of a valid edge to the TI00n pin is detected, the count value of 16-bit timer counter 0n (TM0n) is taken
into 16-bit capture/compare register 01n (CR01n), and then the pulse width of the signal input to the TI00n pin
is measured by clearing TM0n and restarting the count (see register settings in Figure 6-26).
The valid edge of the TI00n pin is specified by bits 4 and 5 (ES0n0, ES0n1) of prescaler mode register 0n (PRM0n),
and it is possible to select either the rising edge or falling edge.
When sampling is performed at the count clock cycle selected by PRM0n and the valid level of the TI00n pin
is detected twice, the first capture operation is performed, resulting in the elimination of short pulse width noise.
Caution
Remark n = 0, 1
TM0n
TI00n
Figure 6-25. Timing of Pulse Width Measurement Operation by Free-Running Counter
0000H 0001H
If the valid edge of the TI00n pin is specified to be both the rising and falling edges, capture/
compare register 00n (CR00n) cannot perform the capture operation.
t
and Two Capture Registers (with Rising Edge Specified)
D0
CHAPTER 6 16-BIT TIMER/EVENT COUNTER
D0
(D1 – D0)
D0+1
User’s Manual U13029EJ7V1UD
t
D1
D1
D1+1
(10000H – D1 + D2)
FFFFH 0000H
t
D2
D2
(D3 – D2)
D2+1
t
D3
D3
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