UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 262
UPD78F0988AGC-8BS
Manufacturer Part Number
UPD78F0988AGC-8BS
Description
Manufacturer
Renesas Electronics America
Datasheet
1.UPD78F0988AGC-8BS.pdf
(431 pages)
Specifications of UPD78F0988AGC-8BS
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maskable
Maskable
Interrupt
Notes 1. The default priority is the priority applicable when more than one maskable interrupt is generated at
Type
Non-
2. Basic configuration types (A) to (D) correspond to (A) to (D) on the next pages.
the same time. 0 is the highest priority and 23 the lowest.
Default
Priority
Note 1
10
11
12
13
14
15
16
17
18
—
0
1
2
3
4
5
6
7
8
9
INTTM000
INTTM010
INTTM001
INTTM011
INTSER0
INTWDT
INTWDT
INTTM7
INTSR0
INTSR1
INTST0
INTST1
INTP0
INTP1
INTP2
INTP3
INTP4
INTP5
INTP6
INTP7
Name
Watchdog timer overflow (when non-
maskable interrupt is selected)
Watchdog timer overflow (when interval
timer mode is selected)
Pin input edge detection
TM7 underflow
TM00 and CR000 match signal generation
(when compare register is specified)
TI010 valid edge detection (when the capture
register is specified)
TM00 and CR010 match signal generation
(when compare register is specified)
TI000 valid edge detection (when the capture
register is specified)
TM01 and CR001 match signal generation
(when compare register is specified)
TI011 valid edge detection (when the capture
register is specified)
TM01 and CR011 match signal generation
(when compare register is specified)
TI001 valid edge detection (when the capture
register is specified)
UART00 receive error generation
End of UART00 reception
End of UART00 transmission
End of UART01 reception
End of UART01 transmission
Table 14-1. Interrupt Source List (1/2)
CHAPTER 14 INTERRUPT FUNCTIONS
Interrupt Source
User’s Manual U13029EJ7V1UD
Trigger
Internal/
External
External
Internal
Internal
Address
000AH
000CH
000EH
001AH
001CH
001EH
Vector
0004H
0006H
0008H
0010H
0012H
0014H
0016H
0018H
0020H
0022H
0024H
0026H
0028H
Table
Configuration
Basic
Type
(A)
(B)
(C)
(B)
Note 2
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