UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 247

• Manufacturer Part Number: UPD78F0988AGC-8BS
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0988AGC-8BS

• Lead Free Status / Rohs Status: Supplier Unconfirmed

TxD0n (Output)
TxD0n (Output)
(c) Transmission
A transmit operation is enabled by setting the TXE0n bit of asynchronous serial interface mode n (ASIM0n)
to 1 and is started by writing transmit data to transmit shift register n (TXS0n). The start bit, parity bit
and stop bit(s) are added automatically.
When transmit operation starts, the data in transmit shift register n (TXS0n) is shifted out, and when
transmit shift register n (TXS0n) is empty, a transmission completion interrupt request (INTSTn) is
generated.
Caution Rewriting of asynchronous serial interface mode register n (ASIM0n) should not be
Remark n = 0, 1
INTSTn
INTSTn
Figure 12-13. Timing of Asynchronous Serial Interface Transmission Completion
performed during a transmit operation. If rewriting of the ASIM0n register is performed
during transmission, subsequent transmit operations may not be possible (the normal
state is restored by RESET input).
It is possible to determine whether transmission is in progress by software by using a
transmission completion interrupt request (INTSTn) or the interrupt request flag (STIFn)
set by INTSTn.
CHAPTER 12 SERIAL INTERFACES UART00 AND UART01
Interrupt Request Generation
START
START
D0
User’s Manual U13029EJ7V1UD
D0
(a) Stop bit length: 1
(b) Stop bit length: 2
D1
D1
D2
D2
D6
D6
D7
D7
Parity
Parity
STOP
STOP
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