UPD78F0988AGC-8BS Renesas Electronics America, UPD78F0988AGC-8BS Datasheet - Page 260

• Manufacturer Part Number: UPD78F0988AGC-8BS
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0988AGC-8BS

• Lead Free Status / Rohs Status: Supplier Unconfirmed

(2) Communication operations
(3) Transfer start
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• The SIO3 operation control bit (CSIE3) = 1
• After an 8-bit serial transfer, either the internal serial clock is stopped or SCK is set to high level.
• Transmit/transmit and receive mode
• Receive-only mode
Caution
In the 3-wire serial I/O mode, data is transmitted and received in 8-bit units. Each bit of data is transmitted or
received in synchronization with the serial clock.
Serial I/O shift register 3 (SIO3) is shifted in synchronization with the falling edge of the serial clock. Transmission
data is held in the SO latch and is output from the SO pin. Data that is received via the SI pin in synchronization
with the rising edge of the serial clock is latched to SIO3.
Completion of an 8-bit transfer automatically stops operation of SIO3 and sets an interrupt request flag (CSIIF3).
A serial transfer starts when the following conditions have been satisfied and transfer data has been set (or read)
to serial I/O shift register 3 (SIO3).
Completion of an 8-bit transfer automatically stops the serial transfer operation and sets an interrupt request flag
(CSIIF3).
When CSIE3 = 1 and MODE = 0, transfer starts when writing to SIO3.
When CSIE3 = 1 and MODE = 1, transfer starts when reading from SIO3.
After data has been written to SIO3, transfer will not start even if the CSIE3 bit value is set
to 1.
CSIIF3
SCK
SO
SI
Transfer starts in synchronization with the SCK falling edge
Figure 13-3. Timing of 3-Wire Serial I/O Mode
1
DO7
DI7
CHAPTER 13 SERIAL INTERFACE SIO3
2
DO6 DO5
DI6
User’s Manual U13029EJ7V1UD
3
DI5
4
DO4
DI4
5
DO3 DO2
DI3
6
DI2
7
DO1 DO0
DI1
Transfer completion
8
DI0