DA82562EM Intel, DA82562EM Datasheet - Page 27

• Manufacturer Part Number: DA82562EM
• Manufacturer: Intel

Specifications of DA82562EM

• Lead Free Status / Rohs Status: Not Compliant

4.1.18.4
Intel 8255x 10/100 Mbps Ethernet Controller Family Open Source Software Developer Manual
Table 4.
Power Management Capabilities
Power Management Control/Status (Offset E0)
The Power Management Control/Status Register (PMCSR) is used to determine and change the
current power state of the device. It also allows for the control of the power management interrupts
in a standard way. Since power management is not implemented in the 82557, this register is hard-
coded to 0 for that device. For the 82558 and later devices this register acts according to the chart
below.
Bit
23
22
21
20
19
81:16
Default Value
0
82558: 0
82559:
no auxiliary power
- 0
with auxiliary
power - 1
1
82558A: 0
82558B, 82559:
no auxiliary power
- 0
with auxiliary
power - 1
0
001
R / W
RO
RO
RO
RO
RO
RO
Description
Reserved. This field is not used by the 8255x.
AUX_Current. If the device is connected to an auxiliary power
supply, the 82559 reports a “1” to indicate that it consume less than
250 mA from the 3.3 Vaux pin while in the D3
reflection of bit 31.
DSI. The Device Specific Initialization bit indicates whether special
initialization of this function is required (beyond the standard PCI
configuration header) before the generic class device driver is able
to use it. Device specific initialization is required for the 82558 and
82559 after a D3 to D0 transition.
Auxiliary Power Source
This bit is only meaningful if PMCSR bit 31 (D3
PME) equals 1. When this bit also equals 1, it indicates that support
for PME# in D3
B-step and 82559 require auxiliary power for wake up from the
D3
present.
PME Clock. When this bit is 1, it indicates that the PME#
generation logic requires its host PCI bus to maintain a free-running
PCI clock. When this bit is 0, it indicates that no host bus clock is
required for the function to generate PME#. The 82558 and later
generation devices do not require a clock to generate PME# and
return 0.
Version. This field specifies to software how to interpret the PMC
and PMCSR registers. A value of 001b indicates that the device
complies with the Revision 1.0 of the PCI Power Management
Interface Specification.
cold
state. Therefore this bit is set to 1 if auxiliary power is
cold
requires an auxiliary power supply. The 82558
cold
cold
state. This bit is a
PCI Interface
supporting
19