DA82562EM Intel, DA82562EM Datasheet - Page 72

• Manufacturer Part Number: DA82562EM
• Manufacturer: Intel

Specifications of DA82562EM

• Lead Free Status / Rohs Status: Not Compliant

Host Software Interface
6.4.2.3.1
64
Table 39. 82559 Configuration Byte Map
Intel 8255x 10/100 Mbps Ethernet Controller Family Open Source Software Developer Manual
Configuration Parameters
The interpretation of the fields from the configuration byte maps are:
•
Byte
10
11
12
13
14
15
16
17
18
19
20
21
0
1
2
3
4
5
6
7
8
9
BYTE 0.
0
0
Adaptive Interframe Spacing
0
0
DMBC
Enable
Save Bad
Frames
Dynamic
TBD
CSMA
Disable
0
Loopback
0
Interframe Spacing
(00000000)
(11110010)
CRS and
CDT
FC Delay Least Significant Byte
FC Delay Most Significant Byte
1
Automatic
FDX
0
0
D7
0
Transmit FIFO Limit
0
Receive DMA Minimum Byte Count
Transmit DMA Maximum Byte Count
Discard
Overruns
2 Frames
in FIFO
0
0
0
1
Priority FC Threshold
Force
FDX
Multiple
IA
0
D6
Byte Count
0
Ext. Stat.
Count
0
0
Link
Wake-up
Enable
Pre-amble Length
0
CRC16
(0)
Reject FC
Priority
FC
Location
0
D5
0
Extended
TxCB
0
0
VLAN
TCO
0
Ignore
U/L
Receive
FC
Restart
1
0
D4
Receive FIFO Limit
Term
Write on
CL
CI
Interrupt
0
0
0
NSAI
0
0
1
Long
Receive
OK
Receive
FC
Restop
1
Multicast
All
D3
Read Al
Enable
TCO
Statistics
Underrun Retry
0
0
1
0
0
Wait After
Win
Receive
CRC
Transfer
Transmit
FC
1
1
D2
Type
Enable
1
0
0
1
0
0
Broadcast
Disable
Padding
Magic
Packet
Wake-up
1
0
D1
MWI
Enable
0
Discard
Short
Receive
1
TCP/UDP
Check-
sum
0
0
1
Promis-
cuous
Stripping
Reserved
1
1
D0