DA82562EM Intel, DA82562EM Datasheet - Page 4

• Manufacturer Part Number: DA82562EM
• Manufacturer: Intel

Specifications of DA82562EM

• Lead Free Status / Rohs Status: Not Compliant

Contents
5
6
7
iv
EEPROM Interface ....................................................................................................................... 25
Host Software Interface .............................................................................................................. 27
6.1
6.2
6.3
6.4
6.5
6.6
6.7
Physical Layer Interface ........................................................................................................... 115
7.1
7.2
7.3
The Shared Memory Architecture....................................................................................... 27
Initializing the LAN Controller ............................................................................................. 29
6.2.1
Controlling the Device......................................................................................................... 31
6.3.1
6.3.2
6.3.3
6.3.4
6.3.5
6.3.6
6.3.7
6.3.8
6.3.9
6.3.10 General Control Register ....................................................................................... 55
6.3.11 General Status Register ........................................................................................ 56
Shared Memory Structures................................................................................................. 57
6.4.1
6.4.2
6.4.3
Command Unit and Receive Unit Operation..................................................................... 103
6.5.1
6.5.2
6.5.3
6.5.4
6.5.5
Flow Control...................................................................................................................... 108
6.6.1
6.6.2
6.6.3
6.6.4
Collision Backoff Modification in Switched Environments................................................. 114
Management Data Interface (MDI) ................................................................................... 115
MDI Register Set .............................................................................................................. 116
7.2.1
7.2.2
7.2.3
7.2.4
7.2.5
7.2.6
Intel 82555 Specific Registers .......................................................................................... 122
7.3.1
7.3.2
7.3.3
7.3.4
7.3.5
Intel 8255x 10/100 Mbps Ethernet Controller Family Open Source Software Developer Manual
LAN Controller Addressing Format........................................................................ 29
Control / Status Registers (CSR)........................................................................... 31
System Control Block (SCB).................................................................................. 33
PORT Interface...................................................................................................... 42
EEPROM Control Register .................................................................................... 45
Management Data Interface Control Register ....................................................... 49
Receive Byte Count Register................................................................................. 51
Early Receive Interrupt .......................................................................................... 52
Flow Control Register ............................................................................................ 53
Power Management Driver Register...................................................................... 54
Action Commands and Operating Modes.............................................................. 57
Specific Action Commands.................................................................................... 59
Receive Operation ................................................................................................. 97
Starting and Completing Control Commands ...................................................... 103
Generating and acknowledging interrupts ........................................................... 103
Command Unit Control ........................................................................................ 104
Receive Unit Control............................................................................................ 106
Updating SCB Status........................................................................................... 108
PHY Based Flow Control ..................................................................................... 109
Frame Based Flow Control .................................................................................. 109
Priority Aware Frame Based Flow Control........................................................... 113
Half Duplex Flow Control ..................................................................................... 114
Control Register: Register 0 ................................................................................ 117
Status Register: Register 1.................................................................................. 118
Identification Registers: Registers 2 and 3 .......................................................... 118
Auto-Negotiation Advertisement Register: Register 4 ......................................... 119
Auto-Negotiation Link Partner Ability Register: Register 5 .................................. 120
Auto-Negotiation Expansion Register: Register 6 ............................................... 120
Status and Control Register: Register 16 ............................................................ 122
Special Control Register: Register 17.................................................................. 123
Clock Synthesis Test and Control Register: Register 18..................................... 124
100BASE-TX Receive False Carrier Counter: Register 19 ................................. 124
100Base-TX Receive Disconnect Counter: Register 20...................................... 124