MC68376BAMFT20 Freescale Semiconductor, MC68376BAMFT20 Datasheet - Page 127

• Manufacturer Part Number: MC68376BAMFT20
• Manufacturer: Freescale Semiconductor

Specifications of MC68376BAMFT20

• Cpu Family: 68K/M683xx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Interface Type: QSPI/SCI
• Program Memory Type: ROM
• Program Memory Size: 8KB
• Total Internal Ram Size: 7.5KB
• # I/os (max): 18
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• On-chip Adc: 16-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 160
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

5.7.8 Use of the Three-State Control Pin
MC68336/376
USER’S MANUAL
CLKOUT
CYCLES
NOTES:
RESET
V
LOCK
VCO
BUS
1. INTERNAL START-UP TIME
2. FIRST INSTRUCTION FETCHED
DD
Figure 5-18 is a timing diagram for power-on reset. It shows the relationships between
RESET, V
Asserting the three-state control (TSC) input causes the MCU to put all output drivers
in a disabled, high-impedance state. The signal must remain asserted for approxi-
mately ten clock cycles in order for drivers to change state.
When the internal clock synthesizer is used (MODCLK held high during reset), synthe-
sizer ramp-up time affects how long the ten cycles take. Worst case is approximately
20 milliseconds from TSC assertion.
When an external clock signal is applied (MODCLK held low during reset), pins go to
high-impedance state as soon after TSC assertion as approximately ten clock pulses
have been applied to the EXTAL pin.
BUS STATE
UNKNOWN
When TSC assertion takes effect, internal signals are forced to
values that can cause inadvertent mode selection. Once the output
drivers change state, the MCU must be powered down and restarted
before normal operation can resume.
DD
, and bus signals.
2 CLOCKS
CONTROL SIGNALS
THREE-STATED
ADDRESS AND
Figure 5-18 Power-On Reset
SYSTEM INTEGRATION MODULE
512 CLOCKS
10 CLOCKS
NOTE
1
2
MOTOROLA
32 POR TIM
5-49