MC68376BAMFT20 Freescale Semiconductor, MC68376BAMFT20 Datasheet - Page 423

• Manufacturer Part Number: MC68376BAMFT20
• Manufacturer: Freescale Semiconductor

Specifications of MC68376BAMFT20

• Cpu Family: 68K/M683xx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Interface Type: QSPI/SCI
• Program Memory Type: ROM
• Program Memory Size: 8KB
• Total Internal Ram Size: 7.5KB
• # I/os (max): 18
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• On-chip Adc: 16-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 160
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

Interrupts
Inter-transfer delay 9-6
INTV D-42
Invalid channel number D-37
IP 9-3, 11-5
IPL D-20
IPM D-67, D-68
IPT 13-9
IPWM D-67, D-68
IRL D-88
IRLQ1 D-29
IRLQ2 D-29
IRQ 5-51, 5-53, 11-5
MC68336/376
USER’S MANUAL
acknowledge
arbitration 5-2, 9-3
exception processing 5-50
initializing 8-34
level (IL)
priority
processing summary 5-53
request level (IRL) bit field D-88
sources 8-32
vector
vectors for QADC 8-33
CTM4 10-18
DASM 10-12
FCSM 10-6
MCSM 10-9
QADC 8-32
QSM 9-3
SIM 5-50
TouCAN 13-19
TPU 11-5
and arbitration 5-52
bus cycles 5-54
IARB field
IARB3 bit
DASM D-64
FCSM D-60
for QSPI (ILQSPI) D-42
for SCI (ILSCI) D-42
MCSM D-61
PWMSM D-69
and recognition 5-51
level field (IPL) 5-60, D-20
mask (IP) field 4-6, 5-51, 9-3, 11-5, D-4
base (IVB) field D-30
base address (IVBA) field D-88
number 9-3
BIUSM D-58
QADC 8-8, D-29
QSM D-41
SIM 5-2, 5-3, 5-52, D-7
TouCAN D-88
TPU 11-5, D-75
DASM D-64
FCSM D-60
MCSM D-61
PWMSM D-69
field (INTV) D-42
I
IST 8-26, D-37
ITC 11-6
IVB 8-33, D-30
IVBA D-88
LBUF D-90
Least significant bit (LSB) 8-15
Left justified
Length of delay after transfer (DTL) D-51
Level-sensitivity 5-51
LJSRR D-39
LJURR D-39
LOAD D-69
LOC D-9
LOCK 7-3, D-25
Lock
Logic
LOOP D-90
Loop
LOOPQ D-52
LOOPS D-43
Loss of clock reset (LOC) D-9
Low power stop (LPSTOP)
Lowest buffer transmitted first (LBUF) D-90
Low-power
LPSTOP 4-14, 5-12, 5-19, 5-34, 10-4
SB
6-2
signed result word table (LJSRR) D-39
unsigned result word table (LJURR) D-39
/release/busy mechanism 13-15
registers (LOCK) D-25
analyzer pod connectors C-2
levels (definition) 2-8
back (LOOP) D-90
mode 4-15
BIUSM 10-4
broadcast cycle 5-34
CPU space cycle 5-34
CPU32 4-14
interrupt mask level 5-34
MRM 7-3
QADC 8-6
QSM 9-2
SIM 5-19
SRAM 6-2
TPU 11-15
TPURAM 12-3
stop mode enable (STOP)
(LOOPS) D-43
instruction sequence 4-15
BIUSM D-57
MRM D-24
QADC D-28
QSM D-41
SRAM D-22
TouCAN D-85
TPU D-73
TPURAM D-82
–L–
MOTOROLA
I-7