A25L016-F AMIC, A25L016-F Datasheet
A25L016-F
Specifications of A25L016-F
Related parts for A25L016-F
A25L016-F Summary of contents
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... BE (August, 2011, Version 1.6) 16Mbit Low Voltage, Serial Flash Memory With 100MHz Uniform 4KB Sectors for 100MHz to 25μA CC2 and t values CE A25L016 Series Issue Date Remark April 2, 2008 Final December 26, 2008 April 9, 2009 April 23, 2010 October 27, 2010 December 21, 2010 August 19, 2011 ...
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... Dual Input and Output Fast Read Instruction SPI Bus Compatible Serial Interface 100MHz Clock Rate (maximum) GENERAL DESCRIPTION The A25L016 is 16M bit Serial Flash Memory, with advanced write protection mechanisms, accessed by a high speed SPI-compatible bus. The memory can be programmed 1 to 256 bytes at a time, using the Page Program instruction ...
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... Address register and Counter (August, 2011, Version 1.6) A25L016 HOLD DIO High Voltage Generator I/O Shift Register 256 Byte Data Buffer 00000h 256 Byte (Page Size) X Decoder 2 A25L016 Series WSON8 Connections A25L016 HOLD DIO SS Status Register 1FFFFF Size of the memory area 000FFh AMIC Technology Corp ...
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... Clock (C) are Don’t Care. To start the Hold condition, the device must be selected, with Chip Select ( Write Protect ( to freeze the size of the area of memory that is protected against program or erase instructions (as specified by the values in the BP2, BP1, and BP0 bits of the Status Register). 3 A25L016 Series Logic Symbol V CC DIO C S ...
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... C remains at 0 for (CPOL=0, CPHA=0) – C remains at 1 for (CPOL=1, CPHA= DIO SPI Memory Device S W HOLD HOLD ) signals should be driven, High or Low as appropriate MSB DO 4 A25L016 Series C DO DIO C DO SPI Memory SPI Memory Device Device S W HOLD S MSB AMIC Technology Corp. DIO W HOLD ...
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... The environments where non-volatile memory devices are used can be very noisy. No SPI device can operate correctly in the presence of excessive noise. To help combat this, the A25L016 boasts the following data protection mechanisms: Power-On Reset and an internal timer (t protection against inadvertent changes while the power ...
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... A25L016 Series Density Portion None None 64KB Upper 1/32 128KB Upper 1/16 256KB Upper 1/8 512KB Upper 1/4 ...
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... To restart communication with the device necessary to drive Hold ( Chip Select ( S ) Low. This prevents the device from going back to the Hold condition. Hold Hold Condition Condition (standard use) (non-standard use) 7 A25L016 Series S ) HOLD ) High, and then to drive AMIC Technology Corp. ...
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... MEMORY ORGANIZATION The memory is organized as: 2,097,152 bytes (8 bits each) 32 blocks (64 Kbytes each) 512 sectors (4 Kbytes each) 8192 pages (256 bytes each) Table 2. Memory Organization A25L016 Address Table Block Sector Address range 511 1FF000h 31 496 1F0000h 495 1EF000h 30 480 1E0000h 479 1DF000h ...
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... Version 1.6) Block 9FFFFh 3 90FFFh 8FFFFh 2 80FFFh 7FFFFh 1 70FFFh 6FFFFh 60FFFh 5FFFFh 0 50FFFh 4FFFFh 40FFFh 9 A25L016 Series Sector Address range 63 3F000h 3FFFFh 48 30000h 30FFFh 47 2F000h 2FFFFh 32 20000h 20FFFh 31 1F000h 1FFFFh 16 10000h 10FFFh 15 0F000h 0FFFFh 4 04000h ...
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... A25L016 Series One-byte Address Dummy Bytes Bytes 06h 0 04h 0 05h 0 01h 0 03h 3 0Bh 3 ...
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... Write Status Register (WRSR) instruction completion ﹣ Page Program (PP) instruction completion ﹣ Sector Erase (SE) instruction completion ﹣ Block Erase (BE) instruction completion ﹣ Chip Erase (CE) instruction completion Instruction DIO High Impedance DO 11 A25L016 Series S ) Low, sending the instruction code, and then S ) High AMIC Technology Corp. ...
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... Register (SRWD, TB, BP2, BP1, BP0) become read-only bits and the Write Status Register (WRSR) instruction is no longer accepted for execution Status Register Out MSB 12 A25L016 Series W ) signal allow the device to be put in the Status Register Out MSB AMIC Technology Corp signal. ...
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... Register Write Disable (SRWD) bit and Write Protect ( signal allow the device to be put in the Hardware Protected Mode (HPM). The Write Status Register (WRSR) instruction is not executed once the Hardware Protected Mode (HPM) is entered initiated. While the Instruction 7 High Impedance MSB 13 A25L016 Series Status Register AMIC Technology Corp ...
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... Write Protect ( If Write Protect ( Protected Mode (HPM) can never be activated, and only the Software Protected Mode (SPM), using the Block Protect (BP2, BP1, BP0) bits of the Status Register, can be used. 14 A25L016 Series Memory Content 1 Protected Area Unprotected Area Ready to accept Page ...
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... C Instruction DIO High Impedance DO Note:. Address bits A23 to A21 are Don’t Care, for A25L016 (August, 2011, Version 1.6) therefore, be read with a single Read Data Bytes (READ Low. instruction. When the highest address is reached, the address counter rolls over to 000000h, allowing the read sequence to be continued indefinitely ...
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... C Dummy Byte DIO DO Note:. Address bits A23 to A21 are Don’t Care, for A25L016 (August, 2011, Version 1.6) Speed (FAST_READ) instruction. When the highest address S ) Low. is reached, the address counter rolls over to 000000h, allowing the read sequence to be continued indefinitely. The Read Data Bytes at Higher Speed (FAST_READ) ...
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... DIO DO Note:. Address bits A23 to A21 are Don’t Care, for A25L016 (August, 2011, Version 1.6) accomplished by adding eight “dummy” clocks after the 24-bit address as shown in figure 10. The dummy clocks allow the device’s internal circuits additional time for setting up the initial address. The input data during the dummy clocks is “ ...
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... The Fast Read Dual Input-Output (BBh) instruction is similar to the Fast_Read (0Bh) instruction except the data is input and output on two pins, DO and DIO, instead of just DO. This allows data to be transferred from the A25L016 at twice the rate of standard SPI devices. Similar to the Fast Read instruction, the Fast Read Dual ...
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... Data Byte 2 DIO MSB Note:. Address bits A23 to A21 are Don’t Care, for A25L016 (August, 2011, Version 1.6) programmed correctly within the same page. If less than 256 Data bytes are sent to device, they are correctly programmed at the requested addresses without having any effects on the other bytes of the same page ...
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... Figure 13. Sector Erase (SE) Instruction Sequence DIO Note:. Address bits A23 to A21 are Don’t Care, for A25L016 (August, 2011, Version 1.6) instruction is not executed. As soon as Chip Select ( driven High, the self-timed Sector Erase cycle (whose duration is t progress, the Status Register may be read to check the value of the Write In Progress (WIP) bit ...
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... Block Erase Figure 14. Block Erase (BE) Instruction Sequence S C DIO Note:. Address bits A23 to A21 are Don’t Care, for A25L016 (August, 2011, Version 1.6) instruction is not executed. As soon as Chip Select ( driven High, the self-timed Block Erase cycle (whose duration is t ...
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... Block Erase Figure 15. Chip Erase (CE) Instruction Sequence S C DIO Note:. Address bits A23 to A21 are Don’t Care, for A25L016 (August, 2011, Version 1.6) instruction is not executed. As soon as Chip Select ( driven High, the self-timed Chip Erase cycle (whose duration initiated ...
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... Any Deep Power-down (DP) instruction, while an Erase, Program or Write cycle is in progress, is rejected without having any effects on the cycle that is in progress. Instruction Stand-by Mode 23 A25L016 Series S ) Low, followed by the instruction code must be driven Low S ) must be driven High after the eighth bit of the ...
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... A25L032, 15h for A25L016). Any Read Identification (RDID) instruction while an Erase, or Program cycle is in progress, is not decoded, and has no effect on the cycle that is in progress ...
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... JEDEC, and has the value 37h for AMIC. The device identification is assigned by the device manufacturer, and has the value 15h for A25L032, 14h for A25L016. Any Read Electronic Manufacturer ID & Device ID (REMS) instruction while an Erase, or Program cycle is in progress, is not decoded, and has no effect on the cycle that is in progress ...
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... Deep Power-down mode. The instruction can also be used to read, on Serial Data Output (DO), the 8-bit Electronic Signature, whose value for the A25L032 is 15h, and for A25L016 is 14h. Except while an Erase, Program or Write Status Register cycle is in progress, the Release from Deep Power-down and ...
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... Stand-by Power mode is delayed by t and Chip Select ( as specified in AC Characteristics Table. Once in the Stand-by Power mode, the device waits to be selected, so that it can receive, decode and execute instructions. 27 A25L016 Series RES1 Stand-by Mode S ) must remain High for at least t AMIC Technology Corp. ...
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... Power-down occurs CC while a Write, Program or Erase cycle is in progress, some data corruption can result A25L016 Series t after V passed the VWI threshold PUW CC afterV passed the V (min) level ...
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... INITIAL DELIVERY STATE The device is delivered with the memory array erased: all bits are set to 1 (each byte contains FFh). The Status Register contains 00h (all Status Register bits are 0). (August, 2011, Version 1.6) Parameter 29 A25L016 Series Min. Max. Unit 2.7 V ...
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... Designers should check that the operating conditions in their circuit match the measurement conditions when relying on performed under the the quoted parameters. Parameter Condition Test Condition OUT =25 ° C and a frequency of 33 MHz A25L016 Series Min. Max. 2.7 3.6 –40 85 Min. Max. 100,000 20 Min. Max AMIC Technology Corp. Unit V ° ...
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... 0.1V / 0.9.V at 100MHz open 0.1V / 0.9.V at 50MHz open 0.1V / 0.9.V at 33MHz open 1.6mA –100µA OH Parameter Parameter 31 A25L016 Series Min. Max –0.5 0.3V 0. –0.2 CC Min. Typ. Max 0.15 0.28 0 Min. Max 0. 0. AMIC Technology Corp. Unit ± 2 µA ± ...
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... Figure 22. AC Measurement I/O Waveform 0.8V 0.2V (August, 2011, Version 1.6) Input Levels A25L016 Series Input and Output Timing Reference Levels 0.7V CC 0.5V CC 0.3V CC AMIC Technology Corp. ...
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... Value guaranteed by characterization, not 100% tested in production. 3. Expressed as a slew-rate. 4. Only applicable as a constraint for a WRSR instruction when SRWD is set at 1. (August, 2011, Version 1.6) Parameter 3 (peak to peak) 3 (peak to peak A25L016 Series Min. Typ. Max. Unit D.C. 100 MHz D.C. 50 MHz ...
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... Figure 23. Serial Input Timing S tCHSL C tDVCH DIO DO Figure 24. Write Protect Setup and Hold Timing during WRSR when SRWD=1 W tWHSL S C DIO DO (August, 2011, Version 1.6) tSLCH tCHDX MSB IN High Impedance High Impedance 34 A25L016 Series tSHSL tSHCH tCHSH tCHCL tCLCH LSB IN tSHWL AMIC Technology Corp. ...
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... Hold Timing Figure 25 DIO DO HOLD Figure 26. Output Timing S C DIO ADDR.LSB IN tCLQV tCLQX tCLQX DO (August, 2011, Version 1.6) tHLCH tCHHL tCHHH tHLQZ tCH tCLQV 35 A25L016 Series tHHCH tHHQX tCL LSB OUT tQLQH tQHQL AMIC Technology Corp. tSHQZ ...
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... Part Numbering Scheme A25 X XXX * Optional (August, 2011, Version 1. A25L016 Series Packing Blank: for DIP8 G: for SOP8 In Tube Q: for Tape & Reel Package Material Blank: normal F: PB free Temperature* Blank = 0°C ~ +70° -40°C ~ +85°C Package Type Blank = DIP8 M = 209 mil SOP 8 ...
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... Ordering Information Part No. Speed (MHz) A25L016-F A25L016-UF A25L016M-F A25L016M-UF 100 A25L016N-F A25L016N-UF A25L016Q4-F Blank is for commercial operating temperature range: 0 ° +70 ° for industrial operating temperature range: -40°C ~ +85°C (August, 2011, Version 1.6) Active Read Program/Erase Current Current Max. (mA) Max. (mA A25L016 Series ...
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... L 0.125 - - E 0.345 - 0.385 A S 0.016 0.021 0.026 do not include mold flash or protrusions. 1 does not include dambar protrusion A25L016 Series Dimensions in mm Min Nom Max - - 4.57 0. 3.25 3.30 3.45 0.36 0.46 0.56 1.27 1.52 1.78 0.81 0.99 1.17 0.20 0.25 ...
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... E 7.70 7.90 E 5.18 5. 1.27 BSC L 0.50 0.65 θ 0° - Notes: Maximum allowable mold flash is 0.15mm at the package ends and 0.25mm between leads 39 A25L016 Series unit θ L Max 2.16 0.25 1.91 0.48 0.25 5.33 8.10 5.38 0.80 8° AMIC Technology Corp. ...
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... Typ. D 0.398 0.413 E 0.291 0.299 e 0.050 Typ. H 0.394 0.419 L 0.016 0.050 θ 8° 0° gate burrs. 40 A25L016 Series unit: inches/ θ L Dimensions in mm Min Max 2.36 2.65 0.10 0.30 0.41 Typ. 0.20 Typ. 10.10 10.50 7.39 7.60 1.27 Typ. 10.01 10 ...
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... E 4.900 5.000 5.100 192.9 E 3.800 4.000 4.200 149 0.500 0.600 0.750 19.7 1.270 BSC 0.080 Note: 1. Controlling dimension: millimeters 2. Leadframe thickness is 0.203mm (8mil) 41 A25L016 Series unit: mm/mil C0. Dimensions in mil Nom Max 29.5 31.5 0.0 0.8 2.0 8.0 REF 15.8 18.9 236.2 240 ...