RS8234EBGC Mindspeed Technologies, RS8234EBGC Datasheet - Page 169

• Manufacturer Part Number: RS8234EBGC
• Description: RS8234EBGC ATM XBR SAR
• Manufacturer: Mindspeed Technologies

RS8234
ATM ServiceSAR Plus with xBR Traffic Management
Figure 6-5. Schedule Slot Formats With USE_SCH_CTRL Asserted
28234-DSH-001-B
6.2.2.4 Schedule Slot
NOTE(S):
(1)
(PRI=VBR_OFFSET+2)
(PRI=VBR_OFFSET+4)
VBR_OFFSET would be set to 0 for these Schedule Slot formats.
= User Defined
VCC_Index
VCC_Index
VCC_Index
VCC_Index
VBR/ABR
VBR/ABR
VBR/ABR
USE_SCH_CTRL
(PRI=14)
CBR
Formats With
Asserted
(1)
CBR_TUN = 1
(PRI=VBR_OFFSET+1)
(PRI=VBR_OFFSET+3)
(PRI=VBR_OFFSET+5)
VCC_Index
VCC_Index
VCC_Index
VCC_Index
VBR/ABR
VBR/ABR
VBR/ABR
VBR/ABR
When USE_SCH_CTRL is asserted, the SLOT_DEPTH and VBR_OFFSET
fields in the SCH_CTRL register plus the CBR_TUN field in the SEG_CTRL
register, dictate the format of each schedule slot. This format is illustrated in
Figure
(PRI=15)
6-5.
(1)
Mindspeed Technologies
SLOT_DEPTH = 000
SLOT_DEPTH = 001
SLOT_DEPTH = 010
SLOT_DEPTH = 111
(PRI=VBR_OFFSET+0)
(PRI=VBR_OFFSET+2)
(PRI=VBR_OFFSET+4)
™
6.2 xBR Cell Scheduler Functional Description
VCC_Index
VCC_Index
VCC_Index
VCC_Index
VBR/ABR
VBR/ABR
VBR/ABR
VBR/ABR
(PRI=14)
CBR_TUN = 0
(1)
6.0 Traffic Management
(PRI=VBR_OFFSET+1)
(PRI=VBR_OFFSET+3)
(PRI=VBR_OFFSET+5)
VCC_Index
VCC_Index
VCC_Index
VCC_Index
VBR/ABR
VBR/ABR
VBR/ABR
VBR/ABR
(PRI=15)
(1)
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