RS8234EBGC Mindspeed Technologies, RS8234EBGC Datasheet - Page 341

• Manufacturer Part Number: RS8234EBGC
• Description: RS8234EBGC ATM XBR SAR
• Manufacturer: Mindspeed Technologies

15.1 Timing
15.1.1 PCI Bus Interface Timing
All PCI bus interface signals are synchronous to the PCI bus clock, HCLK, except for HRST* and HINT*.
Table 15-1
Table 15-1. PCI Bus Interface Timing Parameters (1 of 2)
28234-DSH-001-B
Symbol
t
t
t
high
t
cyc
low
t
su
h
provides the PCI bus interface timing parameters.
HCLK Cycle Time
HCLK High Time
HCLK Low Time
HAD Input Setup Time to HCLK
HC/BE Input Setup Time to HCLK
HPAR Input Setup Time to HCLK
HFRAME* Input Setup Time to HCLK
HIRDY* Input Setup Time to HCLK
HTRDY* Input Setup Time to HCLK
HSTOP* Input Setup Time to HCLK
HDEVSEL* Input Setup Time to HCLK
HIDSEL Input Setup Time to HCLK
HGNT* Input Setup Time to HCLK
HPERR* Input Setup Time to HCLK
Input Hold Time from HCLK–All Inputs
15.0 Electrical and Mechanical
Specifications
15
(1)
(1)
(1)
Parameter
Mindspeed Technologies
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Figure 15-1
™
and
Min
30
11
11
10
7
7
7
7
7
7
7
7
7
7
0
Figure 15-2
Max
illustrate this timing.
—
19
19
—
—
—
—
—
—
—
—
—
—
—
—
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
15-1