STA333W13TR STMicroelectronics, STA333W13TR Datasheet - Page 27

• Manufacturer Part Number: STA333W13TR
• Description: IC DAS 2CH MICROLESS POWERSSO36
• Manufacturer: STMicroelectronics
• Series: Sound Terminal™r
• Type: Audio Processorr

Specifications of STA333W13TR

• Applications: DVD
• Mounting Type: Surface Mount
• Package / Case: 36-BFSOP (0.295", 7.50mm Width) Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-11457-2

STA333W
6.1.3
Channel input mapping
Table 20.
Each channel received via I
channel input mapping registers. This allows for flexibility in processing. The default settings
of these registers map each I
Configuration register C (addr 0x02)
DDX power output mode
Table 21.
DDX compensation pulse size register
Table 22.
6
7
0
1
2
3
4
5
Bit
Bit
Bit
OCRB
D7
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Channel input mapping
DDX power output mode
DDX compensating pulse size
Reserved
D6
0
0
0
1
1
1
0
1
0
RST
RST
RST
CSZ3
C1IM
C2IM
OM0
OM1
CSZ0
CSZ1
CSZ2
CSZ3
2
D5
0
S can be mapped to any internal processing channel via the
2
S input channel to its corresponding processing channel.
Name
Doc ID 13365 Rev 2
Name
Name
CSZ2
D4
1
When OM[1:0] = 11, this register determines the size of
the DDX compensating pulse from 0 to 15 clock periods:
0000: 0 ns (0 ticks) compensating pulse size
0001: 20 ns (1 tick) clock period compensating pulse
size
.....
1111: 300 ns (15 ticks) clock period compensating pulse
size
The DDX power output mode selects the configuration
of the DDX output:
00: drop compensation
01: discrete output stage: tapered compensation
10: full-power mode
11: variable drop compensation (CSZx bits)
0: processing channel 1 receives left I
1: processing channel 1 receives right I
0: processing channel 2 receives left I
1: processing channel 2 receives right I
CSZ1
D3
0
Description
Description
CSZ0
D2
1
Description
Register description
OM1
D1
1
2
2
S input
S input
2
2
S input
S input
OM0
D0
1
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