STA333W13TR STMicroelectronics, STA333W13TR Datasheet - Page 31

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STA333W13TR

Manufacturer Part Number
STA333W13TR
Description
IC DAS 2CH MICROLESS POWERSSO36
Manufacturer
STMicroelectronics
Series
Sound Terminal™r
Type
Audio Processorr
Datasheet

Specifications of STA333W13TR

Applications
DVD
Mounting Type
Surface Mount
Package / Case
36-BFSOP (0.295", 7.50mm Width) Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-11457-2

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STA333W
LRCK double trigger protection
Table 35.
Actively prevents double trigger of LRCLK.
Auto EAPD on clock loss
Table 36.
When active will issue a power device power-down signal (EAPD) on clock loss detection.
IC power down
Table 37.
The PWDN register is used to put the IC in a low-power state. When PWDN is 0, the output
begins a soft-mute. After the mute condition is reached, EAPD is asserted to power down
the power stage, then the master clock to all internal hardware except the I
This puts the IC in a very low power consumption state.
External amplifier power down
Table 38.
The EAPD register directly disables/enables the internal power circuitry.
When EAPD = 0, the internal power section is placed in a low-power state (disabled).
4
5
6
7
Bit
Bit
Bit
Bit
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
LRCK double trigger protection
Auto EAPD on clock loss
Power down
External amplifier power down
1
0
1
1
RST
RST
RST
RST
LDTE
ECLE
PWDN
EAPD
Doc ID 13365 Rev 2
Name
Name
Name
Name
0: external power stage power down active
1: normal operation
0: power down, low-power condition
1: normal operation
Auto EAPD on clock loss
LRCLK double trigger protection enable
Description
Description
Description
Description
Register description
2
C block is gated.
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