AM186CC-40KI\W C AMD (ADVANCED MICRO DEVICES), AM186CC-40KI\W C Datasheet - Page 23

• Manufacturer Part Number: AM186CC-40KI\W C
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM186CC-40KI\W C

• Lead Free Status / Rohs Status: Not Compliant

Signal Name
[CTS_U]
[RTR_U]
High-Speed UART
[RXD_HU]
[CTS_HU]
[RTR_HU]
SYNCHRONOUS SERIAL INTERFACE (SSI)
[SCLK]
[SDATA]
[SDEN]
HIGH-LEVEL DATA LINK CONTROL SYNCHRONOUS COMMUNICATION INTERFACES
HDLC Channel A (DCE)
DCE_RXD_A
DCE_TXD_A
DCE_RCLK_A
TXD_HU
Multiplexed
Signal(s)
[DCE_TCLK_D]
[PCM_FSC_D]
PIO24
DCE_RCLK_D
[PCM_CLK_D]
PIO25
PIO16
—
[DCE_CTS_D]
[PCM_TSC_D]
PIO46
[DCE_RTR_D]
PIO47
PIO11
PIO12
PIO10
[GCI_DD_A]
[PCM_RXD_A]
[GCI_DU_A]
[PCM_TXD_A]
[GCI_DCL_A]
[PCM_CLK_A]
Am186™CC Communications Controller Data Sheet
Table 4. Signal Descriptions (Continued)
Type Description
OD-O DCE Transmit Data Channel A is the serial data output pin for the channel A
STI
STI
STI
STI
STI
O
O
O
O
B
O
Clear-To-Send UART provides the Clear-to-Send signal from the asynchronous
serial port when hardware flow control is enabled for the port. The [CTS_U]
signal gates the transmission of data from the serial port transmit shift register.
When [CTS_U] is asserted, the transmitter begins transmission of a frame of
data, if any is available. If [CTS_U] is deasserted, the transmitter holds the data
in the serial port transmit shift register. The value of [CTS_U] is checked only at
the beginning of the transmission of the frame. [CTS_U] and [RTR_U] form the
hardware handshaking interface for the UART.
Ready-To-Receive UART provides the Ready-to-Receive signal for the
asynchronous serial port when hardware flow control is enabled for the port. The
[RTR_U] signal is asserted when the associated serial port receive data register
does not contain valid, unread data. [CTS_U] and [RTR_U] form the hardware
handshaking interface for the UART.
Receive Data High-Speed UART is the asynchronous serial receive data signal
that supplies data from the high-speed serial port to the controller.
Transmit Data High-Speed UART is the asynchronous serial transmit data
signal that supplies data to the high-speed serial port from the microcontroller.
Clear-To-Send High-Speed UART provides the Clear-to-Send signal from the
high-speed asynchronous serial port when hardware flow control is enabled for
the port. The [CTS_HU] signal gates the transmission of data from the serial port
transmit shift register. When [CTS_HU] is asserted, the transmitter begins
transmission of a frame of data, if any is available. If [CTS_HU] is deasserted,
the transmitter holds the data in the serial port transmit shift register. The value
of [CTS_HU] is checked only at the beginning of the transmission of the frame.
[CTS_HU] and [RTR_HU] form the hardware handshaking interface for the High-
Speed UART.
Ready-To-Receive High-Speed UART provides the Ready-to-Receive signal to
the high-speed asynchronous serial port when hardware flow control is enabled
for the port. The [RTR_HU] signal is asserted when the associated serial port
receive data register does not contain valid, unread data. [CTS_HU] and
[RTR_HU] form the hardware handshaking interface for the High-Speed UART.
Serial Clock provides the clock for the synchronous serial interface to allow
synchronous transfers between the Am186CC controller and a slave device.
Serial Data is used to transmit and receive data between the Am186CC
controller and a slave device on the synchronous serial interface.
Serial Data Enable enables data transfers on the synchronous serial interface.
DCE Receive Data Channel A is the serial data input pin for the channel A DCE
interface.
DCE interface.
DCE Receive Clock Channel A provides the receive clock to the channel A
DCE interface. If the same clock is to be used for both transmit and receive, then
this pin should be tied to the DCE_TCLK_A pin externally.
The DCE function is the default at reset, so the board designer is responsible for
properly terminating the DCE_RCLK_A input.
23