AM186CC-40KI\W C AMD (ADVANCED MICRO DEVICES), AM186CC-40KI\W C Datasheet - Page 74

• Manufacturer Part Number: AM186CC-40KI\W C
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM186CC-40KI\W C

• Lead Free Status / Rohs Status: Not Compliant

Notes:
1. All timing parameters are measured at V
2. TXD becomes valid after the CLK rising edge or FSC enable, whichever is later.
3. During the second half of the last bit transmittal, TXD is driven weak so that other devices can safely drive during this time.
74
No.
10
11
12
13
14
15
16
17
18
are with the load values shown in Table 35, “Pin List Summary,” on page A-12.
1
2
3
4
5
6
7
8
9
Symbol
t
t
t
t
t
SYNSS
t
t
WSYN
t
SUDC
t
DTW
t
SUFC
t
CLKP
t
t
t
DCLT
t
t
t
DCD
HCD
t
HCF
DCT
DZF
DZF
DFT
DTZ
WH
WL
HFI
3
Description
PCM clock period
PCM clock High
PCM clock Low
Hold time from CLK Low to FSC valid
Delay time to valid TXD from CLK
Delay time to valid TXD from FSC
Setup time for FSC High to CLK Low
Delay time from CLK High to TXD valid
Setup time from RXD valid to CLK
Hold time from CLK Low to RXD invalid
Delay to TSC valid from CLK
Delay to TSC valid from FSC
Delay from CLK Low of last bit to TSC invalid
Hold time from CLK Low to FSC invalid
Time between successive synchronization pulses
FSC width invalid
Delay from last bit CLK Low to TXD weak drive
Delay from last bit CLK (plus 1) High to TXD disable
Am186™CC Communications Controller Data Sheet
Table 21. PCM Highway Timing (Timing Slave)
Parameter
CC
/2 with 50-pF loading on CLKOUT unless otherwise noted. All output test conditions
1, 2
Min
200
80
80
35
35
16
Preliminary
0
1
1
1
5
1
1
1
0
8
1
1
Max
—
—
—
25
25
25
—
25
25
25
—
—
25
25
—
—
—
—
Unit
CLK
CLK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns