AM186CC-40KI\W C AMD (ADVANCED MICRO DEVICES), AM186CC-40KI\W C Datasheet - Page 25

• Manufacturer Part Number: AM186CC-40KI\W C
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM186CC-40KI\W C

• Lead Free Status / Rohs Status: Not Compliant

Signal Name
[DCE_TXD_D]
DCE_RCLK_D
[DCE_TCLK_D] [CTS_U] (UART)
[DCE_CTS_D]
[DCE_RTR_D]
HDLC Channel A (PCM)
[PCM_RXD_A]
[PCM_TXD_A]
[PCM_CLK_A]
[PCM_FSC_A]
[PCM_TSC_A]
HDLC Channel B (PCM)
[PCM_RXD_B]
[PCM_TXD_B]
[PCM_CLK_B]
[PCM_FSC_B]
[PCM_TSC_B]
HDLC Channel C (PCM)
[PCM_RXD_C]
[PCM_TXD_C]
[PCM_CLK_C]
Multiplexed
Signal(s)
[TXD_U] (UART)
[PCM_TXD_D]
PIO20
[RTR_U] (UART)
[PCM_CLK_D]
PIO25
[PCM_FSC_D]
PIO24
[CTS_HU] (High-
Speed UART)
[PCM_TSC_D]
PIO46
[RTR_HU] (High-
Speed UART)
PIO47
DCE_RXD_A
[GCI_DD_A]
DCE_TXD_A
[GCI_DU_A]
DCE_RCLK_A
[GCI_DCL_A]
DCE_TCLK_A
[GCI_FSC_A]
[DCE_CTS_A]
PIO17
[DCE_RXD_B]
PIO36
[DCE_TXD_B]
PIO37
[DCE_RCLK_B]
PIO40
[DCE_TCLK_B]
PIO41
[DCE_CTS_B]
PIO38
[DCE_RXD_C]
PIO42
[DCE_TXD_C]
PIO43
[DCE_RCLK_C]
PIO22
Am186™CC Communications Controller Data Sheet
Table 4. Signal Descriptions (Continued)
Type Description
OD-O
O-LS-
O-LS-
O-LS-
STI-
STI
STI
STI
STI
STI
STI
OD
STI
STI
STI
OD
STI
OD
OD
OD
O
O
DCE Transmit Data Channel D is the serial data output pin for the channel D
DCE interface.
DCE Receive Clock Channel D provides the receive clock to the channel D
DCE interface. If the same clock is to be used for both transmit and receive, then
this pin should be tied to the [DCE_TCLK_D] pin externally.
DCE Transmit Clock Channel D provides the transmit clock to the channel D
DCE interface. If the same clock is to be used for both transmit and receive, then
this pin should be tied to the DCE_RCLK_D pin externally.
DCE Clear To Send Channel D indicates to the channel D DCE interface that
an external serial interface is ready to receive data. [DCE_CTS_D] and
[DCE_RTR_D] provide the handshaking for DCE Channel D.
DCE Ready To Receive Channel D indicates to an external serial interface that
the internal channel D DCE interface is ready to accept data. [DCE_CTS_D] and
[DCE_RTR_D] provide the handshaking for the channel D DCE interface.
PCM Receive Data Channel A is the serial data input pin for the channel A PCM
Highway interface.
PCM Transmit Data Channel A is the serial data output pin for the channel A
PCM Highway interface.
PCM Clock is the single transmit and receive data clock pin for the channel A
PCM Highway interface.
PCM Frame Synchronization Clock provides the Frame Synchronization Clock
input (usually 8 kHz) for the channel A PCM Highway interface.
PCM Time Slot Control A enables an external buffer device when channel A
PCM Highway data is present on the [PCM_TXD_A] output pin in PCM Highway
mode.
PCM Receive Data Channel B is the serial data input pin for the channel B PCM
Highway interface.
PCM Transmit Data Channel B is the serial data output pin for the channel B
PCM Highway interface.
PCM Clock is the single transmit and receive data clock pin for the channel B
PCM Highway interface.
PCM Frame Synchronization Clock provides the Frame Synchronization Clock
input (usually 8 kHz) for the channel B PCM Highway interface.
PCM Time Slot Control B enables an external buffer device when channel B
PCM Highway data is present on the [PCM_TXD_B] output pin in PCM Highway
mode.
PCM Receive Data Channel C is the serial data input pin for the channel C PCM
Highway interface.
PCM Transmit Data Channel C is the serial data output pin for the channel C
PCM Highway interface.
PCM Clock: For PCM Highway operation, [PCM_CLK_C] is the single transmit
and receive data clock input pin for the channel C PCM Highway interface.
[PCM_CLK_C] becomes a clock source output when the GCI to PCM Highway
clock and frame synchronization conversion are enabled.
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