AM186CC-40KI\W C AMD (ADVANCED MICRO DEVICES), AM186CC-40KI\W C Datasheet - Page 75

• Manufacturer Part Number: AM186CC-40KI\W C
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM186CC-40KI\W C

• Lead Free Status / Rohs Status: Not Compliant

PCM_RXD_x
Notes:
Note that the PCM_TXD_x outputs three-state. In the signal description and pin list summary tables, PCM_TXD_x is listed as
O-LS-OD (totem pole output/programmable to hold last state of pin/open drain output) because of the following design characteristic.
On the last bit to be transmitted in PCM highway mode, PCM_TXD_x will be driven normally during the first 1/2 bit time. During
the last 1/2 bit time of the last bit of the transmission, PCM_TXD_x control will be in the hold-last-state condition (LS). In this
condition, the output is driven, but at a much weaker strength. This permits another device (external to the microcontroller) to
start driving during this time without bus contention problems. After this 1/2 bit time of hold-last-state condition, the PCM_TXD_x
pin will be fully three-stated.
In some applications, several PCM highway devices may have their PCM_TXD pins tied together. The time slot assigners
should be programmed so that only one device is active at any time.
The PCM_TSC_x signal permits external bus drivers, possibly to go external to the board. Each PCM_TSC_x signal is open-
drain so that multiple PCM_TSC_x pins can be connected together. For example, two Am186CC microcontrollers could be con-
nected on the same PCM highway and (with proper configuration of the time slot assigners) could occupy different time slots.
An external bus driver would need to be active for both Am186CC time slots. The open drain on the PCM_TSC_x pins permits
them to be wired together to achieve this.
PCM_CLK_x
PCM_FSC_x
PCM_TXD_x
PCM_TSC_x
4
11
5
1
1
6
7
Figure 31. PCM Highway Waveforms (Timing Slave)
Am186™CC Communications Controller Data Sheet
14
12
2
2
15
3
8
16
3
10
9
4
13
n
17
18
n+1
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