SI3225-G-GQ Silicon Laboratories Inc, SI3225-G-GQ Datasheet - Page 45

• Manufacturer Part Number: SI3225-G-GQ
• Description: IC PROSLIC/CODEC DUAL 64TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: ProSLIC®r

Specifications of SI3225-G-GQ

• Function: Subscriber Line Interface Concept (SLIC), CODEC
• Interface: GCI, PCM, SPI
• Number Of Circuits: 2
• Voltage - Supply: 3.3V, 5V
• Current - Supply: 65mA
• Power (watts): 941mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-TQFP, 64-VQFP
• Includes: Battery Switching, BORSCHT Functions, DTMF Generation and Decoding, FSK Tone Generation, Modem and Fax Tone Detection
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.10. Loop Closure Detection
Loop closure detection is required to accurately signal a
terminal device going off-hook during the Active, On-
Hook Transmission (forward or reverse polarity), and
ringing linefeed states. The functional blocks required to
implement a loop closure detector are shown in
Figure 21, and the register set for detecting a loop
closure event is provided in Table 25. The primary input
to the system is the loop current sense value from the
voltage/current/power
reported in the I
The loop current (I
processor (ISP) using the equations shown below.
Refer to Figure 18 on page 38 for the discrete bipolar
transistor references) used in the equation below (Q1,
Q2, Q5 and Q6 – note that the Si3200/2 has
corresponding MOS transistors). The same I
equation applies to the discrete bipolar linefeed as well
as the Si3200/2 linefeed device. The following equation
is conditioned by the CMH status bit in register LCRRTP
and by the linefeed state as indicated by the LFS field in
the LINEFEED register.
If the CMHITH (RAM 36) threshold is exceeded, the
CMH bit is 1, and I
FORWARD-ACTIVE and TIP-OPEN states, or I
forced to zero in the REVERSE-ACTIVE and RING-
OPEN states. The other currents in the equation are
allowed to contribute normally to the I
The conditioning due to the CMH bit (LCRRTP Register)
I
loop
=
=
I
I
--------------------------------------------------- - in all other states
Q1
Q1
–
I
I
I
I
–
Q2
Q5
Q6
Q1
I
I
Q6
Q6
LOOP
+
+
2
LOOP
I
I
Q5
Q5
CMH
Processor
RAM address.
–
–
Signal
Input
) is computed by the input signal
I
I
Q2
Q1
monitoring
Q2
LFS
in TIP-OPEN or RING-OPEN
is forced to zero in the
I
LOOP
Figure 21. Loop Closure Detection Circuitry
circuitry
LOOP
LCRLPF
Digital
LPF
LCROFFHK
value.
Loop Closure
Threshold
and
LCRONHK
Q2
LOOP
+
–
Rev. 1.3
is
is
and LFS field (LINEFEED Register) states can be
summarized as follows:
The output of the ISP is the input to a programmable
digital low-pass filter that removes unwanted ac signal
components before threshold detection.
The low-pass filter coefficient is calculated using the
following equation and is entered into the LCRLPF RAM
location:
LCRLPF = [(2 π f x 4096)/800] x 2
Where f = the desired cutoff frequency of the filter.
The programmable range of the filter is from 0h (blocks
all signals) to 4000h (unfiltered). A typical value of 10
(0A10h) is sufficient to filter out any unwanted ac
artifacts while allowing the dc information to pass
through the filter.
The output of the low-pass filter is compared to a
programmable threshold, LCROFFHK. Hysteresis is
enabled
LCRONHK, to detect the loop going to an open or on-
hook state. The threshold comparator output feeds a
programmable debounce filter. The output of the
debounce filter remains in its present state unless the
input remains in the opposite state for the entire period
of time programmed by the loop closure debounce
interval, LCRDBI. There is also a loop closure mask
interval, LCRMASK, that is used to mask transients
caused when an internal ringing burst (with no offset)
ends in the presence of a high REN load. If the
debounce interval has been satisfied, the LCR bit is set
to indicate that a valid loop closure has occurred.
LCRMASK
Closure
Mask
IQ1 = 0 if (CMH = 1 AND (LFS = 1 OR LFS = 3))
IQ2 = 0 if (CMH = 1 AND (LFS = 5 OR LFS = 7))
Loop
Si3220/25 Si3200/02
by
Debounce
LCRDBI
Filter
programming
LCR
Interrupt
LOOPE
Logic
a
3
second
LOOPS
threshold,
45