PSB 2132 H V2.2 Infineon Technologies, PSB 2132 H V2.2 Datasheet - Page 15

IC CODEC FILTER 2CHAN MQFP-64

PSB 2132 H V2.2

Manufacturer Part Number
PSB 2132 H V2.2
Description
IC CODEC FILTER 2CHAN MQFP-64
Manufacturer
Infineon Technologies
Series
SICOFI®r
Datasheet

Specifications of PSB 2132 H V2.2

Package / Case
64-QFP
Function
CODEC Filter
Interface
IOM-2 PCM, SPI
Number Of Circuits
2
Voltage - Supply
5V
Current - Supply
18mA
Power (watts)
90mW
Mounting Type
Surface Mount
Includes
Level Metering Function, Tone Generation
Number Of Adc Inputs
2
Number Of Dac Outputs
2
Interface Type
Serial
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Number Of Channels
2
Snr
35.4 dB
Supply Current
40 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
PSB2132HV2.2XT
SP000007696
2.2
Table 1
1, 2
3, 4,
5
6, 7,
8, 9
10,
11,
12
13,
14
15
16
17
18
19
20
21
Hardware Reference Manual
Pin Symbol Type Function
CHCLK
GNDD
DOUT
DCLK
NUIO
NUIO
CS#
NUI
NUI
DIN
NC
NC
Pin Definitions and Functions
Pin Definitions and Functions
I/O
I/O
O
O
I
I
I
I
I
I
Non Usable Input
Pins must be tied directly to digital ground GNDD (Pin 21)
Non Usable Input/Output
Pins must be tied via a pull-down-resistor to digital ground
GNDD (Pin 21)
Not Connected
Pins are not connected in this device.
Non Usable Input/Output
Pins must be tied via a pull-down resistor to digital ground
GNDD (Pin 21)
Non Usable Input
Pins must be tied directly to digital ground GNDD (Pin 21)
Not Connected
Pin is not connected in this device.
Chopper Clock Output
Provides 256, 512, or 16,384 kHz signal; sync. to DCL.
Chip Select
Microcontroller Interface Chip Select, enable to read or
write; active low.
Data Clock
Microcontroller Interface data clock, shifts data from or to
device; maximum clock rate 8192 kHz.
Data Input
Microcontroller Interface control data input pin; DCLK
determines data rate.
Data Output
Microcontroller Interface control data output pin; DCLK
determines data rate: DOUT is high impedance "Z" if no
data is transmitted from the SICOFI
Digital Ground
Ground reference for all digital signals. Internally isolated
from GNDA1 (Pin 50), GNDA2 (Pin 54), and GNDA (Pins
59 and 63).
6
®
2-TE.
Pin Descriptions
PSB 2132
2001-02-20
both
both
both
both
both
both
Ch.

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