PSB 2132 H V2.2 Infineon Technologies, PSB 2132 H V2.2 Datasheet - Page 8

• Manufacturer Part Number: PSB 2132 H V2.2
• Description: IC CODEC FILTER 2CHAN MQFP-64
• Manufacturer: Infineon Technologies
• Series: SICOFI®r

Specifications of PSB 2132 H V2.2

• Package / Case: 64-QFP
• Function: CODEC Filter
• Interface: IOM-2 PCM, SPI
• Number Of Circuits: 2
• Voltage - Supply: 5V
• Current - Supply: 18mA
• Power (watts): 90mW
• Mounting Type: Surface Mount
• Includes: Level Metering Function, Tone Generation
• Number Of Adc Inputs: 2
• Number Of Dac Outputs: 2
• Interface Type: Serial
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Number Of Channels: 2
• Snr: 35.4 dB
• Supply Current: 40 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: PSB2132HV2.2XT; SP000007696

List of Figures
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Hardware Reference Manual
SICOFI
SICOFI
Pin Configuration of SICOFI
SICOFI
SICOFI
Analog and PCM Signal Levels in A-Law Mode . . . . . . . . . . . . . . . . . .15
Analog and PCM Signal Levels in µ-Law Mode . . . . . . . . . . . . . . . . . . .15
Simplified Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Total Distortion Measured with Sine-Wave, Receive and Transmit . . . .20
Overload Compression (µ-Law Coding, Transmit Direction) . . . . . . . . .21
Out-of-Band Discrimination in Transmit Direction . . . . . . . . . . . . . . . . .22
Analog Output: Out-of-Band Signals . . . . . . . . . . . . . . . . . . . . . . . . . . .23
Analog Output: Out-of-Band Idle Channel Noise . . . . . . . . . . . . . . . . . .24
Analog Interface to Two Subscriber Line Interface Circuits (SLICs) . . .26
IOM-2 PCM Interface Time Slot Positions . . . . . . . . . . . . . . . . . . . . . . .29
Signaling Example: Two Subscriber Lines. . . . . . . . . . . . . . . . . . . . . . .30
Serial Microcontroller Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
Example for a Two-Byte Write Access. . . . . . . . . . . . . . . . . . . . . . . . . .33
Example for a One-Byte Read Access . . . . . . . . . . . . . . . . . . . . . . . . .33
Example for a Read Access with Byte-by-Byte Transfer . . . . . . . . . . . .34
Bi-Directional Data Signal: DIN and DOUT Strapped Together. . . . . . .34
Channel-Specific and Common Coefficients . . . . . . . . . . . . . . . . . . . . .37
Development System with STUT 2466 Evaluation Board . . . . . . . . . . .39
SICOFI
Proposal for a Ground Concept . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
PCM Interface Timing in Single Clocking Mode. . . . . . . . . . . . . . . . . . .45
PCM Interface Timing in Double Clocking Mode . . . . . . . . . . . . . . . . . .46
Timing of the Microcontroller Interface. . . . . . . . . . . . . . . . . . . . . . . . . .47
Signaling Output Timing (Data Downstream) . . . . . . . . . . . . . . . . . . . .48
Analog Loops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49
Digital Loops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50
Cut-Off’s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .51
®
®
®
®
®
2-TE Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2-TE Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
2-TE Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
2-TE State Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
2-TE Test Circuit Configuration . . . . . . . . . . . . . . . . . . . . . . . .40
®
2-TE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
PSB 2132
2001-02-20
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