ATmega256RZAV Atmel Corporation, ATmega256RZAV Datasheet - Page 159

• Manufacturer Part Number: ATmega256RZAV
• Manufacturer: Atmel Corporation

Specifications of ATmega256RZAV

• Flash (kbytes): 256 Kbytes
• Max. Operating Frequency: 16 MHz
• Max I/o Pins: 54
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Crypto Engine: No
• Sram (kbytes): 8
• Eeprom (bytes): 4096
• Operating Voltage (vcc): 1.8 to 3.6
• Timers: 6
• Frequency Band: 2.4 GHz
• Max Data Rate (mb/s): 0.25
• Antenna Diversity: No
• External Pa Control: No
• Power Output (dbm): 3
• Receiver Sensitivity (dbm): -101
• Receive Current Consumption (ma): 16.0
• Transmit Current Consumption (ma): 17.0
• Link Budget (dbm): 104

2549N–AVR–05/11
• Bit 1:0 – WGMn1:0: Waveform Generation Mode
Combined with the WGMn3:2 bits found in the TCCRnB Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see
Timer/Counter unit are: Normal mode (counter), Clear Timer on Compare match (CTC) mode,
and three types of Pulse Width Modulation (PWM) modes. For more information on the different
modes, see
Table 17-3.
Table 17-4
PWM mode.
Table 17-4.
Note:
COMnA1
COMnB1
COMnC1
COMnA1
COMnB1
COMnC1
0
0
1
1
0
0
1
1
A special case occurs when OCRnA/OCRnB/OCRnC equals TOP and
COMnA1/COMnB1/COMnC1 is set. In this case the compare match is ignored, but the set or clear
is done at BOTTOM.
shows the COMnx1:0 bit functionality when the WGMn3:0 bits are set to the fast
“Modes of Operation” on page
COMnA0
COMnB0
COMnC0
COMnA0
COMnB0
COMnC0
Compare Output Mode, non-PWM
Compare Output Mode, Fast PWM
0
1
0
1
0
1
0
1
disconnected (normal port operation). For all other WGM1 settings, normal
WGM13:0 = 14 or 15: Toggle OC1A on Compare Match, OC1B and OC1C
See “Fast PWM Mode” on page 150.
Clear OCnA/OCnB/OCnC on compare match, set OCnA/OCnB/OCnC at
Set OCnA/OCnB/OCnC on compare match, clear OCnA/OCnB/OCnC at
Clear OCnA/OCnB/OCnC on compare match (set output to low level)
Set OCnA/OCnB/OCnC on compare match (set output to high level)
ATmega640/1280/1281/2560/2561
Table 17-2 on page
Normal port operation, OCnA/OCnB/OCnC disconnected
Normal port operation, OCnA/OCnB/OCnC disconnected
port operation, OC1A/OC1B/OC1C disconnected
Toggle OCnA/OCnB/OCnC on compare match
148.
BOTTOM (non-inverting mode)
BOTTOM (inverting mode)
148. Modes of operation supported by the
Description
Description
for more details.
159