ATmega256RZAV Atmel Corporation, ATmega256RZAV Datasheet - Page 183

• Manufacturer Part Number: ATmega256RZAV
• Manufacturer: Atmel Corporation

Specifications of ATmega256RZAV

• Flash (kbytes): 256 Kbytes
• Max. Operating Frequency: 16 MHz
• Max I/o Pins: 54
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Crypto Engine: No
• Sram (kbytes): 8
• Eeprom (bytes): 4096
• Operating Voltage (vcc): 1.8 to 3.6
• Timers: 6
• Frequency Band: 2.4 GHz
• Max Data Rate (mb/s): 0.25
• Antenna Diversity: No
• External Pa Control: No
• Power Output (dbm): 3
• Receiver Sensitivity (dbm): -101
• Receive Current Consumption (ma): 16.0
• Transmit Current Consumption (ma): 17.0
• Link Budget (dbm): 104

20.6.1
20.7
2549N–AVR–05/11
Timer/Counter Timing Diagrams
Compare Output Mode and Waveform Generation
The Waveform Generator uses the COM2x1:0 bits differently in normal, CTC, and PWM modes.
For all modes, setting the COM2x1:0 = 0 tells the Waveform Generator that no action on the
OC2x Register is to be performed on the next compare match. For compare output actions in the
non-PWM modes refer to
page
A change of the COM2x1:0 bits state will have effect at the first compare match after the bits are
written. For non-PWM modes, the action can be forced to have immediate effect by using the
FOC2x strobe bits.
The following figures show the Timer/Counter in synchronous mode, and the timer clock (clk
is therefore shown as a clock enable signal. In asynchronous mode, clk
the Timer/Counter Oscillator clock. The figures include information on when Interrupt Flags are
set.
count sequence close to the MAX value in all modes other than phase correct PWM mode.
Figure 20-8. Timer/Counter Timing Diagram, no Prescaling
Figure 20-9
Figure 20-9. Timer/Counter Timing Diagram, with Prescaler (f
Figure 20-8
TCNTn
TCNTn
(clk
(clk
188, and for phase correct PWM refer to
TOVn
TOVn
clk
clk
clk
clk
I/O
I/O
I/O
I/O
Tn
Tn
/1)
/8)
shows the same timing data, but with the prescaler enabled.
contains timing data for basic Timer/Counter operation. The figure shows the
MAX - 1
MAX - 1
Table 20-5 on page
ATmega640/1280/1281/2560/2561
MAX
MAX
Table 20-7 on page
188. For fast PWM mode, refer to
BOTTOM
BOTTOM
clk_I/O
189.
/8)
I/O
should be replaced by
BOTTOM + 1
BOTTOM + 1
Table 20-6 on
183
T2
)