ATmega88 Atmel Corporation, ATmega88 Datasheet - Page 194

• Manufacturer Part Number: ATmega88
• Manufacturer: Atmel Corporation

Specifications of ATmega88

• Flash (kbytes): 8 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 20 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 23
• Ext Interrupts: 24
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 6
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

20.10.5
20.11 Examples of baud rate setting
2545T–AVR–05/11
UBRRnL and UBRRnH – USART baud rate registers
Table 20-8.
• Bit 15:12 – Reserved bits
These bits are reserved for future use. For compatibility with future devices, these bit must be
written to zero when UBRRnH is written.
• Bit 11:0 – UBRR11:0: USART baud rate register
This is a 12-bit register which contains the USART baud rate. The UBRRnH contains the four
most significant bits, and the UBRRnL contains the eight least significant bits of the USART
baud rate. Ongoing transmissions by the Transmitter and Receiver will be corrupted if the baud
rate is changed. Writing UBRRnL will trigger an immediate update of the baud rate prescaler.
For standard crystal and resonator frequencies, the most commonly used baud rates for asyn-
chronous operation can be generated by using the UBRRn settings in
UBRRn values which yield an actual baud rate differing less than 0.5% from the target baud
rate, are bold in the table. Higher error ratings are acceptable, but the Receiver will have less
noise resistance when the error ratings are high, especially for large serial frames (see
chronous operational range” on page
equation:
Bit
Read/write
Initial value
UCPOLn
0
1
UCPOLn bit settings.
Transmitted data changed (output of
TxDn pin)
Rising XCKn edge
Falling XCKn edge
R/W
15
R
–
7
0
0
R/W
14
R
–
6
0
0
Error[%]
R/W
13
R
–
5
0
0
=
187). The error values are calculated using the following
⎛
⎝
BaudRate
------------------------------------------------- - 1
R/W
BaudRate
12
R
–
4
0
0
UBRRn[7:0]
Closest Match
R/W
R/W
11
3
0
0
Received data sampled (input on RxDn
pin)
Falling XCKn edge
Rising XCKn edge
–
⎞
⎠
•
R/W
R/W
ATmega48/88/168
10
2
0
0
UBRRn[11:8]
100%
R/W
R/W
Table 20-9 on page
9
1
0
0
R/W
R/W
8
0
0
0
UBRRnH
UBRRnL
“Asyn-
195.
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