ATmega88 Atmel Corporation, ATmega88 Datasheet - Page 49

• Manufacturer Part Number: ATmega88
• Manufacturer: Atmel Corporation

Specifications of ATmega88

• Flash (kbytes): 8 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 20 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 23
• Ext Interrupts: 24
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 6
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

11.8
11.8.1
2545T–AVR–05/11
Watchdog timer
Features
Thus, when the BOD is not enabled, after setting the ACBG bit or enabling the ADC, the user
must always allow the reference to start up before the output from the analog comparator or
ADC is used. To reduce power consumption in power-down mode, the user can avoid the three
conditions above to ensure that the reference is turned off before entering power-down mode.
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Figure 11-7. Watchdog timer.
The Atmel ATmega48/88/168 has an enhanced watchdog timer (WDT). The WDT is a timer
counting cycles of a separate on-chip 128kHz oscillator. The WDT gives an interrupt or a system
reset when the counter reaches a given time-out value. In normal operation mode, it is required
that the system uses the WDR - watchdog timer reset - instruction to restart the counter before
the time-out value is reached. If the system doesn't restart the counter, an interrupt or system
reset will be issued.
In interrupt mode, the WDT gives an interrupt when the timer expires. This interrupt can be used
to wake the device from sleep-modes, and also as a general system timer. One example is to
limit the maximum time allowed for certain operations, giving an interrupt when the operation
has run longer than expected. In system reset mode, the WDT gives a reset when the timer
expires. This is typically used to prevent system hang-up in case of runaway code. The third
mode, Interrupt and system reset mode, combines the other two modes by first giving an inter-
rupt and then switch to system reset mode. This mode will for instance allow a safe shutdown by
saving critical parameters before a system reset.
Clocked from separate on-chip oscillator
Three operating modes
Selectable time-out period from 16ms to 8s
Possible hardware fuse watchdog always on (WDTON) for fail-safe mode
– Interrupt
– System reset
– Interrupt and system reset
WATCHDOG
RESET
OSCILLATOR
128kHz
WDIE
WDIF
WDE
ATmega48/88/168
WDP0
WDP1
WDP2
WDP3
MCU RESET
INTERRUPT
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