ATmega88 Atmel Corporation, ATmega88 Datasheet - Page 313

• Manufacturer Part Number: ATmega88
• Manufacturer: Atmel Corporation

Specifications of ATmega88

• Flash (kbytes): 8 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 20 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 23
• Ext Interrupts: 24
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 6
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

2545T–AVR–05/11
Figure 29-9. Parallel programming timing, reading sequence (within the same page) with tim-
Note:
Table 29-8.
Symbol
V
I
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
PP
DVXH
XLXH
XHXL
XLDX
XLWL
XLPH
PLXH
BVPH
PHPL
PLBX
WLBX
PLWL
BVWL
WLWH
WLRL
WLRH
WLRH_CE
PP
XTAL1
DATA
BS1
XA0
XA1
OE
1. The timing requirements shown in
also apply to reading operation.
Parameter
Programming enable voltage
Programming enable current
Data and control valid before XTAL1 high
XTAL1 low to XTAL1 high
XTAL1 pulse width high
Data and control hold after XTAL1 low
XTAL1 low to WR low
XTAL1 low to PAGEL high
PAGEL low to XTAL1 high
BS1 valid before PAGEL high
PAGEL pulse width high
BS1 hold after PAGEL low
BS2/1 hold after WR low
PAGEL low to WR low
BS1 valid to WR low
WR pulse width low
WR low to RDY/BSY low
WR low to RDY/BSY high
WR low to RDY/BSY high for chip erase
ing requirements
Parallel programming characteristics, V
ADDR0 (low byte)
LOAD ADDRESS
(LOW BYTE)
t
XLOL
t
OLDV
(1)
.
(1)
DATA (low byte)
READ DATA
(LOW BYTE)
Figure 29-7 on page 312
(2)
t
BVDV
CC
= 5V ±10%.
Min.
11.5
200
150
150
150
150
(HIGH BYTE)
3.7
7.5
READ DATA
67
67
67
67
67
67
67
0
0
0
DATA (high byte)
ATmega48/88/168
(that is, t
Typ.
t
OHDZ
DVXH
LOAD ADDRESS
(LOW BYTE)
, t
Max.
ADDR1 (low byte)
12.5
XHXL
250
4.5
1
9
, and t
Units
XLDX
ms
µA
ns
µs
V
313
)