STM8S103F3

Manufacturer Part NumberSTM8S103F3
DescriptionAccess line, 16 MHz STM8S 8-bit MCU, up to 8 Kbytes Flash, data EEPROM
ManufacturerSTMicroelectronics
STM8S103F3 datasheet
 

Specifications of STM8S103F3

Program Memory8 Kbytes Flash; data retention 20 years at 55 °C after 10 kcyclesData Memory640 bytes true data EEPROM; endurance 300 kcycles
Ram1 KbytesAdvanced Control Timer16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization
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Product overview
Master clock sources: Four different clock sources can be used to drive the master
clock:
-
1-16 MHz high-speed external crystal (HSE)
-
Up to 16 MHz high-speed user-external clock (HSE user-ext)
-
16 MHz high-speed internal RC oscillator (HSI)
-
128 kHz low-speed internal RC (LSI)
Startup clock: After reset, the microcontroller restarts by default with an internal 2 MHz
clock (HSI/8). The prescaler ratio and clock source can be changed by the application
program as soon as the code execution starts.
Clock security system (CSS): This feature can be enabled by software. If an HSE clock
failure occurs, the internal RC (16 MHz/8) is automatically selected by the CSS and an
interrupt can optionally be generated.
Configurable main clock output (CCO): This outputs an external clock for use by the
application.
Table 2: Peripheral clock gating bit assignments in CLK_PCKENR1/2 registers
Bit
Peripheral
Bit
clock
PCKEN17
TIM1
PCKEN13
PCKEN16
Reserved
PCKEN12
PCKEN15
TIM2
PCKEN11
PCKEN14
TIM4
PCKEN10
4.6
Power management
For efficent power management, the application can be put in one of four different low-power
modes. You can configure each mode to obtain the best compromise between lowest power
consumption, fastest start-up time and available wakeup sources.
Wait mode: In this mode, the CPU is stopped, but peripherals are kept running. The
wakeup is performed by an internal or external interrupt or reset.
Active halt mode with regulator on: In this mode, the CPU and peripheral clocks are
stopped. An internal wakeup is generated at programmable intervals by the auto wake up
unit (AWU). The main voltage regulator is kept powered on, so current consumption is
higher than in active halt mode with regulator off, but the wakeup time is faster. Wakeup
is triggered by the internal AWU interrupt, external interrupt or reset.
Active halt mode with regulator off: This mode is the same as active halt with regulator
on, except that the main voltage regulator is powered off, so the wake up time is slower.
Halt mode: In this mode the microcontroller uses the least power. The CPU and peripheral
clocks are stopped, the main voltage regulator is powered off. Wakeup is triggered by
external event or reset.
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STM8S103K3 STM8S103F3 STM8S103F2
Peripheral
Bit
Peripheral
clock
clock
UART1
PCKEN27
Reserved
Reserved
PCKEN26
Reserved
SPI
PCKEN25
Reserved
2
I
C
PCKEN24
Reserved
DocID15441 Rev 7
Bit
Peripheral
clock
PCKEN23
ADC
PCKEN22
AWU
PCKEN21
Reserved
PCKEN20
Reserved