ST7LITEU09 STMicroelectronics, ST7LITEU09 Datasheet - Page 17

• Manufacturer Part Number: ST7LITEU09
• Description: ST7ULTRALITE - 8-BIT MCU WITH 2K SINGLE VOLTAGE FLASH MEMORY, ADC, TIMERS
• Manufacturer: STMicroelectronics

Specifications of ST7LITEU09

• 2k Bytes Single Voltage Flash Program Memory With Read-out Protection, In-circuit And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55°C
• 128 Bytes Data Eeprom. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55°C
• Clock Sources: internal trimmable 8MHz RC oscillator, internal low power, low frequency RC oscillator or external clock
• Five Power Saving Modes: Halt, Auto Wake Up from Halt, Active-Halt, Wait and Slow
• One 8-bit Lite Timer (lt) With Prescaler Including: watchdog, 1 realtime base and 1 input capture

ST7LITEU05 ST7LITEU09
Table 3.
Address
003Bh to
0003h to
0014h to
0019h to
0031h to
0040h to
0002Fh
00030h
000Ah
000Bh
000Ch
000Dh
000Eh
002Eh
003Ah
003Ch
003Dh
003Eh
0000h
0001h
0002h
000Fh
0010h
0011h
0012h
0013h
0016h
0017h
0018h
0033h
0034h
0035h
0036h
0037h
0038h
0039h
003Fh
0046h
0047h
0048h
Auto-reload
Auto-reload
Hardware register map
Clock and
EEPROM
controller
MuxIO-
Port A
Block
Flash
Clock
MCC
timer
timer
timer
reset
reset
ADC
AVD
Lite
ITC
ITC
PADR
PADDR
PAOR
LTCSR
LTICR
ATCSR
CNTRH
CNTRL
ATRH
ATRL
PWMCR
PWM0CSR
DCR0H
DCR0L
FCSR
EECSR
ADCCSR
ADCDRH
ADCDRL
EICR1
MCCSR
RCCR
SICSR
EICR2
AVDTHCR
CKCNTCSR
MUXCR0
MUXCR1
Register label
Port A data register
Port A data direction register
Port A option register
Lite timer control/status register
Lite timer input capture register
Timer control/status register
Counter register high
Counter register low
Auto-reload register high
Auto-reload register low
PWM output control register
PWM 0 control/status register
PWM 0 duty cycle register high
PWM 0 duty cycle register low
Flash control/status register
Data EEPROM control/status register
A/D control status register
A/D data register high
A/D data register low
External interrupt control register 1
Main clock control/status register
RC oscillator control register
System integrity control/status register
External interrupt control register 2
AVD threshold selection register
Clock controller control/status register
Mux IO-reset control register 0
Mux IO-reset control register 1
Reserved area (22 bytes)
Reserved area (8 bytes)
Reserved area (3 bytes)
Reserved area (3 bytes)
Reserved area (2 bytes)
Reserved area (7 bytes)
Register name
Register & memory map
0000 0x00b
status
00h
02h
Reset
FFh
08h
0xh
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
xxh
00h
00h
00h
00h
03h
09h
00h
00h
(2)
(3)
(1)
Read only
Read only
Read only
Read only
Remarks
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
(1)
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