ST7LITEU09 STMicroelectronics, ST7LITEU09 Datasheet - Page 83

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ST7LITEU09

Manufacturer Part Number
ST7LITEU09
Description
ST7ULTRALITE - 8-BIT MCU WITH 2K SINGLE VOLTAGE FLASH MEMORY, ADC, TIMERS
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7LITEU09

2k Bytes Single Voltage Flash Program Memory With Read-out Protection, In-circuit And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention
20 years at 55°C
128 Bytes Data Eeprom. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55°C
Clock Sources
internal trimmable 8MHz RC oscillator, internal low power, low frequency RC oscillator or external clock
Five Power Saving Modes
Halt, Auto Wake Up from Halt, Active-Halt, Wait and Slow
One 8-bit Lite Timer (lt) With Prescaler Including
watchdog, 1 realtime base and 1 input capture

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The total conversion time:
t
While the ADC is on, these two phases are continuously repeated.
At the end of each conversion, the sample capacitor is kept loaded with the previous
measurement load. The advantage of this behaviour is that it minimizes the current
consumption on the analog pin in case of single input channel measurement.
A/D conversion
The analog input ports must be configured as input, no pull-up, no interrupt. Refer to the “I/O
ports” chapter. Using these pins as analog inputs does not affect the ability of the port to be
read as a logic input.
In the ADCCSR register:
ADC conversion mode
In the ADCCSR register:
Set the ADON bit to enable the A/D converter and to start the conversion. From this time on,
the ADC performs a continuous conversion of the selected channel.
When a conversion is complete:
A read to the ADCDRH or a write to any bit of the ADCCSR register resets the EOC bit.
To read the 10 bits, perform the following steps:
1.
2.
3.
To read only 8 bits, perform the following steps:
1.
2.
Changing the conversion channel
The application can change channels during conversion.
When software modifies the CH[2:0] bits in the ADCCSR register, the current conversion is
stopped, the EOC bit is cleared, and the A/D converter starts converting the newly selected
channel.
CONV =
cycles) and the C
the optimum analog to digital conversion accuracy.
Select the CS[2:0] bits to assign the analog channel to convert.
The EOC bit is set by hardware.
The result is in the ADCDR registers.
Poll EOC bit
Read ADCDRL
Read ADCDRH. This clears EOC automatically.
Poll EOC bit
Read ADCDRH. This clears EOC automatically.
t
SAMPLE
+ t
HOLD
ADC
sample capacitor is disconnected from the analog input pin to get
On-chip peripherals
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