ST7LITEU09 STMicroelectronics, ST7LITEU09 Datasheet - Page 94

• Manufacturer Part Number: ST7LITEU09
• Description: ST7ULTRALITE - 8-BIT MCU WITH 2K SINGLE VOLTAGE FLASH MEMORY, ADC, TIMERS
• Manufacturer: STMicroelectronics

Specifications of ST7LITEU09

• 2k Bytes Single Voltage Flash Program Memory With Read-out Protection, In-circuit And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55°C
• 128 Bytes Data Eeprom. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55°C
• Clock Sources: internal trimmable 8MHz RC oscillator, internal low power, low frequency RC oscillator or external clock
• Five Power Saving Modes: Halt, Auto Wake Up from Halt, Active-Halt, Wait and Slow
• One 8-bit Lite Timer (lt) With Prescaler Including: watchdog, 1 realtime base and 1 input capture

Instruction set
Table 44.
94/139
Mnemo
JRUGT
JRULE
SWAP
PUSH
TRAP
NEG
NOP
RRC
XOR
MUL
POP
RCF
RSP
SBC
SRA
SUB
RET
RLC
SCF
SRL
TNZ
RIM
SLA
WFI
SIM
SLL
OR
LD
Shift right arithmetic
Push onto the stack
Reset Stack Pointer
Illegal opcode detection (continued)
Test for Neg & Zero
Negate (2's compl)
Jump if (C + Z = 0)
Jump if (C + Z = 1)
Pop from the stack
Subtract with carry
Rotate right true C
Shift left arithmetic
Disable interrupts
Subroutine return
Enable Interrupts
Rotate left true C
Wait for interrupt
Reset carry flag
Shift right logic
SWAP nibbles
OR operation
Set carry flag
Shift left logic
Exclusive OR
No operation
Description
Subtraction
S/W trap
Multiply
Load
Dst[7..4]<=>Dst[3..0]
Function/example
Dst7 => Dst => C
S = Max allowed
C <= Dst <= C
C => Dst => C
C <= Dst <= 0
C <= Dst <= 0
0 => Dst => C
A = A XOR M
A = A - M - C
S/W interrupt
Unsigned <=
Unsigned >
X,A = X * A
dst <= src
A = A + M
A = A - M
neg $10
pop reg
pop CC
tnz lbl1
push Y
C = 0
C = 1
I = 0
I = 1
A, X, Y
reg, M
reg, M
reg, M
reg, M
reg, M
reg, M
reg, M
reg, M
reg, M
Dst
reg
CC
M
A
A
A
A
reg, CC
X, Y, A
M, reg
Src
M
M
M
M
M
M
ST7LITEU05 ST7LITEU09
H
H
0
0
1
1
0
I
I
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
0
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
C
C
C
C
C
C
C
C
C
C
C
0
0
1