ST7LITEU09 STMicroelectronics, ST7LITEU09 Datasheet - Page 47

• Manufacturer Part Number: ST7LITEU09
• Description: ST7ULTRALITE - 8-BIT MCU WITH 2K SINGLE VOLTAGE FLASH MEMORY, ADC, TIMERS
• Manufacturer: STMicroelectronics

Specifications of ST7LITEU09

• 2k Bytes Single Voltage Flash Program Memory With Read-out Protection, In-circuit And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55°C
• 128 Bytes Data Eeprom. 300k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55°C
• Clock Sources: internal trimmable 8MHz RC oscillator, internal low power, low frequency RC oscillator or external clock
• Five Power Saving Modes: Halt, Auto Wake Up from Halt, Active-Halt, Wait and Slow
• One 8-bit Lite Timer (lt) With Prescaler Including: watchdog, 1 realtime base and 1 input capture

ST7LITEU05 ST7LITEU09
Note:
Caution:
8.4.2
Use of LVD with capacitive power supply: with this type of power supply, if power cuts occur
in the application, it is recommended to pull V
conditions. Refer to circuit example in
The LVD is an optional function which can be selected by option byte. See
page
disabled, an external circuitry must be used to ensure a proper power-on reset.
It is recommended to make sure that the V
device is exiting from Reset, to ensure the application functions properly.
Make sure the right combination of LVD and AVD thresholds is used as LVD and AVD levels
are not correlated. Refer to
more details.
If an LVD reset occurs after a watchdog reset has occurred, the LVD will take priority and will
clear the watchdog flag.
Figure 19. Low voltage detector vs reset
Figure 20. Reset and supply management block diagram
Auxiliary voltage detector (AVD)
The voltage detector function (AVD) is based on an analog comparison between a V
and V
reference value for falling voltage is lower than the V
voltage in order to avoid parasitic detection (hysteresis).
The output of the AVD comparator is directly readable by the application software through a
real time status bit (AVDF) in the SICSR register. This bit is read only.
127. It allows the device to be used without any external Reset circuitry. If the LVD is
IT+(AVD)
V
V
RESET
IT+
IT-
(LVD)
RESET
(LVD)
V
V
SS
DD
reference value and the V
V
DD
RESET SEQUENCE
MANAGER
Section 13.3.2 on page 98
(RSM)
TIMER (WDG)
Figure 67 on page 118
WATCHDOG
DD
DD
main supply voltage (V
SICSR
DD
supply voltage rises monotonously when the
7
0
V
down to 0V to ensure optimum restart
hys
SYSTEM INTEGRITY MANAGEMENT
1
IT+(AVD)
AUXILIARY VOLTAGE
1
LOW VOLTAGE
and
DETECTOR
DETECTOR
0
(AVD)
(LVD)
0
Section 13.3.3 on page 98
reference value for rising
LVD
and note 4.
RF
STATUS FLAG
AVD
F
AVD
AVD Interrupt Request
AVD
IE
0
). The V
Section 15.1 on
IT-(AVD)
Interrupts
IT-(AVD)
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for