ST92150JDV1QAuto STMicroelectronics, ST92150JDV1QAuto Datasheet - Page 423

• Manufacturer Part Number: ST92150JDV1QAuto
• Description: 8/16-bit single voltage Flash MCU family with RAM, E3 TM(emulated EEPROM), CAN 2.0B and J1850 BLPD
• Manufacturer: STMicroelectronics

Specifications of ST92150JDV1QAuto

• Internal Memory: Single Voltage FLASH up to 256 Kbytes, RAM up to 8Kbytes, 1K byte E3 TM (Emulated EEPROM)
• Minimum Instruction Time: 83 ns (24 MHz int. clock)

KNOWN LIMITATIONS (Cont’d)
Here is an example of a patch for the MFT1 using
DMA in ouput compare mode, inserted at the be-
ginning of the MFT0 interrupt routine:
spp #8 ;Set to page 8 (mft1)
tm T_IDMR,#0x08 ;test mft0 OCMP dma
mask bit
jxnz MFT0_it_routine
cpw DMA_CNT1,#0 ;If the DMA count is
not at zero the block did not complete
jxeq MFT0_it_routine
and T_FLAGR,#11011111b ;Clear dma
compare interrupt request
ST92124xxx-Auto/150xxxxx-Auto/250xxxx-Auto
or T_IDMR,#0x08 ;Re-enable the com-
pare 0 dma
MFT0_it_routine: ;MFT0 interrupt rou-
tine code
In addition, the peripheral DMA priorities must be
organized so that the MFT DMA priorities are the
highest. This way the impact is limited: DMA re-
quests with the wrong Mask Bit Reset are serv-
iced.
Workaround Limitation
If the counter event period is too short, the failure
recovery in the interrupt routines will not work.
423/430
1