ST7232AK2-Auto STMicroelectronics, ST7232AK2-Auto Datasheet - Page 124

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ST7232AK2-Auto

Manufacturer Part Number
ST7232AK2-Auto
Description
8-bit MCU for automotive, 16 Kbyte Flash, 10-bit ADC, 4 timers, SPI, SCI
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7232AK2-Auto

Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators and bypass for external clock
Four Power Saving Modes
halt, active halt, wait and slow
Main Clock Controller With
real time base, beep and clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, PWM and pulse generator modes
On-chip peripherals
Note:
124/201
Noise error
Oversampling techniques are used for data recovery by discriminating between valid
incoming data and noise. Normal data bits are considered valid if three consecutive samples
(8th, 9th, 10th) have the same bit value, otherwise the NF flag is set. In the case of start bit
detection, the NF flag is set on the basis of an algorithm combining both valid edge
detection and three samples (8th, 9th, 10th). Therefore, to prevent the NF flag getting set
during start bit reception, there should be a valid edge detection as well as three valid
samples.
When noise is detected in a frame:
The NF flag is reset by a SCISR register read operation followed by a SCIDR register read
operation.
During reception, if a false start bit is detected (example, 8th, 9th, 10th samples are
011,101,110), the frame is discarded and the receiving sequence is not started for this
frame. There is no RDRF bit set for this frame and the NF flag is set internally (not
accessible to the user). This NF flag is accessible along with the RDRF bit when a next valid
frame is received.
If the application start bit is not long enough to match the above requirements, then the NF
flag may get set due to the short start bit. In this case, the NF flag may be ignored by the
application software when the first valid byte is received.
See also
The NF flag is set at the rising edge of the RDRF bit
Data is transferred from the shift register to the SCIDR register
No interrupt is generated. However this bit rises at the same time as the RDRF bit
which itself generates an interrupt.
Noise error causes on page
129.
ST7232Axx-Auto

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