ST7232AK2-Auto STMicroelectronics, ST7232AK2-Auto Datasheet - Page 26

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ST7232AK2-Auto

Manufacturer Part Number
ST7232AK2-Auto
Description
8-bit MCU for automotive, 16 Kbyte Flash, 10-bit ADC, 4 timers, SPI, SCI
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7232AK2-Auto

Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators and bypass for external clock
Four Power Saving Modes
halt, active halt, wait and slow
Main Clock Controller With
real time base, beep and clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, PWM and pulse generator modes
Register and memory map
Table 3.
1. x = undefined
2. R/W = read/write
3. The bits associated with unavailable pins must always keep their reset value
4. The contents of the I/O port DR registers are readable only in output configuration. In input configuration, the values of the
26/201
Address
0058h to
003Ch
003Dh
004Ch
004Dh
0031h
0032h
0033h
0034h
0035h
0036h
0037h
0038h
0039h
003Ah
003Bh
003Eh
003Fh
0040h
0041h
0042h
0043h
0044h
0045h
0046h
0047h
0048h
0049h
004Ah
004Bh
004Eh
004Fh
0050h
0051h
0052h
0053h
0054h
0055h
0056h
0057h
006Fh
0070h
0071h
0072h
0073h
007Fh
I/O pins are returned instead of the DR register contents
Timer A
Timer B
Block
Hardware register map (continued)
ADC
SCI
TACR2
TACR1
TACSR
TAIC1HR
TAIC1LR
TAOC1HR
TAOC1LR
TACHR
TACLR
TAACHR
TAACLR
TAIC2HR
TAIC2LR
TAOC2HR
TAOC2LR
TBCR2
TBCR1
TBCSR
TBIC1HR
TBIC1LR
TBOC1HR
TBOC1LR
TBCHR
TBCLR
TBACHR
TBACLR
TBIC2HR
TBIC2LR
TBOC2HR
TBOC2LR
SCISR
SCIDR
SCIBRR
SCICR1
SCICR2
SCIERPR
SCIETPR
ADCCSR
ADCDRH
ADCDRL
Register label
Timer A control register 2
Timer A control register 1
Timer A control/status register
Timer A input capture 1 high register
Timer A input capture 1 low register
Timer A output compare 1 high register
Timer A output compare 1 low register
Timer A counter high register
Timer A counter low register
Timer A alternate counter high register
Timer A alternate counter low register
Timer A input capture 2 high register
Timer A input capture 2 low register
Timer A output compare 2 high register
Timer A output compare 2 low register
Timer B control register 2
Timer B control register 1
Timer B control/status register
Timer B input capture 1 high register
Timer B input capture 1 low register
Timer B output compare 1 high register
Timer B output compare 1 low register
Timer B counter high register
Timer B counter low register
Timer B alternate counter high register
Timer B alternate counter low register
Timer B input capture 2 high register
Timer B input capture 2 low register
Timer B output compare 2 high register
Timer B output compare 2 low register
SCI status register
SCI data register
SCI baud rate register
SCI control register 1
SCI control register 2
SCI extended receive prescaler register
Reserved area
SCI extended transmit prescaler register
Control/status register
Data high register
Data low register
Reserved area (24 bytes)
Reserved area (13 bytes)
Reserved area (1 byte)
Register name
Reset status
x000 0000b
xxxx x0xxb
xxxx x0xxb
FCh
FCh
FCh
FCh
C0h
00h
00h
80h
00h
FFh
FFh
80h
00h
00h
00h
80h
00h
FFh
FFh
80h
00h
00h
00h
00h
00h
00h
00h
00h
xxh
xxh
xxh
xxh
xxh
xxh
xxh
xxh
xxh
ST7232Axx-Auto
(1)
Remarks
R/W
R/W
R/W
Read only
Read only
R/W
R/W
Read only
Read only
Read only
Read only
Read only
Read only
R/W
R/W
R/W
R/W
R/W
Read only
Read only
R/W
R/W
Read only
Read only
Read only
Read only
Read only
Read only
R/W
R/W
Read only
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Read only
Read only
(2)

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