ACS8526LC Semtech Corporation, ACS8526LC Datasheet

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ACS8526LC

Manufacturer Part Number
ACS8526LC
Description
Line Card Protection Switch for PDH, Sonet or SDH Systems
Manufacturer
Semtech Corporation
Datasheet
The ACS8526 is a highly integrated single-chip solution
for protection switching between two SECs (SDH/SONET
Equipment Clocks) from Master and Slave SETS clock
cards, for line cards in a PDH, SONET or SDH Network
Element. The ACS8526 has fast activity monitors on the
inputs and will raise a flag on a pin if there is a loss of
activity on the currently selected input. The protection
switching between the input reference clock sources is
controlled by an external pin.
The ACS8526 has two SEC reference clock input ports,
configured for expected frequency by setting hardware
pins or by writing to registers via the serial interface.
The ACS8526 can perform frequency translation,
converting, for example, an 8 kHz SEC input clock from a
backplane into a 155.52 MHz clock for local line cards.
The ACS8526 generates two independent SEC clock
outputs, one on a PECL/LVDS port and one on a
TTL/CMOS port, at spot frequencies configured by
hardware pins, or by writing to registers via the serial
interface. The hardware selectable spot frequencies
range from 1.544 MHz up to 155.52 MHz, with further
options for N x E1/DS1 and 311.04 MHz via register
selection. The ACS8526 also provides an 8 kHz Frame
Sync output and 2 kHz Multi-Frame Sync output, both with
programmable pulse width and polarity.
Advanced configuration possibilities are available via the
serial port (which can be SPI compatible), however the
basic configuration of I/O frequencies and SONET/SDH
selection by hardware make the device suitable for
standalone operation, i.e., no need for a microprocessor.
Figure 1 Block Diagram of the ACS8526 LC/P LITE
Revision 4.01/June 2006 © Semtech Corp.
Description
ADVANCED COMMUNICATIONS
Block Diagram
ADVANCED COMMUNICATIONS
2 x SEC TTL inputs
SEC Inputs:
Programmable
Frequencies
N x 8 kHz
1.544 MHz
2.048 MHz
6.48 MHz
19.44 MHz
25.92 MHz
38.88 MHz
51.84 MHz
77.76 MHz
LOS_ALARM
SONSDHB
IP_FREQ
SRCSW
SEC1
SEC2
TRST
TMS
TDO
TCK
TDI
SEC Port
1149.1
Selector
JTAG
Input
IEEE
Generator
TCXO or
Clock
Chip
XO
Digital Feedback
DPLL1
APLL3
Priority
Table
F8526D_001BLOCKDIA_03
Register Set
Synthesis
E1/DS1
DPLL2
FINAL
FINAL
Page 1
Line Card Protection Switch for PDH, SONET
Features
Line card protection switch - partners Semtech SETS
devices for Stratum 3E/3/4E/4 PDH, SONET or SDH
applications
High performance DPLL/APLL solution
Output jitter compliant to STM-1
Two independent SEC inputs ports (TTL)
Four independent output ports:
TTL I/O ports: spot frequencies 2 kHz to 77.76 MHz
PECL/LVDS port: spot frequencies 2 kHz to 311 MHz
N x E1/DS1 mode
Programmable pulse width and polarity on Syncs
SONET/SDH frequency translation
Digital Holdover mode on input failure
Separate activity monitors and register alarms on
each input.
“Loss of activity” on selected input flagged on
dedicated pin
Source switch under external hardware control
PLL “Locked” and “Acquisition” bandwidth selectable
from 18, 35 or 70 Hz
Configurable via serial interface or hardware pins
Output clock phase continuity to GR-1244-CORE
Single 3.3 V operation, 5 V I/O compatible
IEEE 1149.1 JTAG Boundary Scan is supported
Operating temperature (ambient) of -40 to +85°C
Available in LQFP 64 package
Lead (Pb)-free version available (ACS8526T), RoHS
and WEEE compliant.
MUX
MUX
SPI Compatible
Serial Interface
2
1
Port
Two clock ports: one PECL/LVDS, one TTL
Two Syncs (TTL): 8 kHz FrSync & 2 KHz MFrSync
APLL 1
APLL2
OP_FREQ1
OP_FREQ2
Frequency
Selection
ACS8526 LC/P LITE
Output
Port
Output Frequencies/MHz
01 Output:
19.44
25.92
34.368 (E3)
38.88
44.736 (DS3)
51.84
77.76
155.52
SEC Outputs:
01 (LVDS/PECL)
02 (TTL)
Sync Outputs:
MFrSync 2 kHz (TTL)
FrSync 8 kHz (TTL)
or SDH Systems
02 Output:
1.544
2.048
3.088
19.44
25.92
34.368 (E3)
38.88
44.736 (DS3)
51.84
77.76
DATASHEET
www.semtech.com
[13]

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