74ACT18825MTDX

Manufacturer Part Number74ACT18825MTDX
DescriptionIC BUFF DVR TRI-ST 18BIT 56TSSOP
ManufacturerFairchild Semiconductor
Series74ACT
74ACT18825MTDX datasheet
 


Specifications of 74ACT18825MTDX

Logic TypeBuffer/Line Driver, Non-InvertingNumber Of Elements2
Number Of Bits Per Element9Current - Output High, Low24mA, 24mA
Voltage - Supply4.5 V ~ 5.5 VOperating Temperature-40°C ~ 85°C
Mounting TypeSurface MountPackage / Case56-TSSOP
Lead Free Status / RoHS StatusLead free / RoHS Compliant  
1
Page 1
2
Page 2
3
Page 3
4
Page 4
5
Page 5
6
Page 6
Page 1/6

Download datasheet (52Kb)Embed
Next
74ACT18825
18-Bit Buffer/Line Driver with 3-STATE Outputs
General Description
The ACT18825 contains eighteen non-inverting buffers
with 3-STATE outputs designed to be employed as a mem-
ory and address driver, clock driver, or bus oriented trans-
mitter/receiver. The device is byte controlled. Each byte
has separate 3-STATE control inputs which can be shorted
together for full 18-bit operation.
Ordering Code:
Order Number
Package Number
74ACT18825SSC
MS56A
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
74ACT18825MTD
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Pin Names
Description
OE
Output Enable Input (Active LOW)
n
I
–I
Inputs
0
17
O
–O
Outputs
0
17
FACT , FACT Quiet Series
and GTO
are trademarks of Fairchild Semiconductor Corporation.
© 1999 Fairchild Semiconductor Corporation
Features
Broadside pinout allows for easy board layout
Separate control logic for each byte
Extra data width for wider address/data paths or buses
carrying parity
Outputs source/sink 24 mA
TTL-compatible inputs
Package Description
Connection Diagram
DS0500292
August 1999
Revised October 1999
www.fairchildsemi.com

74ACT18825MTDX Summary of contents

  • Page 1

    ... Outputs 0 17 FACT , FACT Quiet Series and GTO are trademarks of Fairchild Semiconductor Corporation. © 1999 Fairchild Semiconductor Corporation Features Broadside pinout allows for easy board layout Separate control logic for each byte Extra data width for wider address/data paths or buses ...

  • Page 2

    Functional Description The ACT18825 contains eighteen non-inverting buffers with 3-STATE standard outputs. The device is byte con- trolled with each byte functioning identically, but indepen- dently of the other. The control pins may be shorted together to obtain full 8-bit ...

  • Page 3

    Absolute Maximum Ratings Supply Voltage ( Input Diode Current ( 0. 0. Output Diode Current ( 0. 0. Output ...

  • Page 4

    AC Electrical Characteristics Symbol Parameter t Propagation Delay PHL t Data to Output PLH t Output Enable PZL t Time PZH t Output Disable PLZ t Time PHZ Note 4: Voltage Range 5.0 is 5.0V 0.5V. Capacitance Symbol Parameter C ...

  • Page 5

    Physical Dimensions inches (millimeters) unless otherwise noted 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide Package Number MS56A 5 www.fairchildsemi.com ...

  • Page 6

    Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...