FAN6300DY Fairchild Semiconductor, FAN6300DY Datasheet

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FAN6300DY

Manufacturer Part Number
FAN6300DY
Description
Fan6300 - Highly Integrated Quasi-resonant Current Mode Pwm Controller
Manufacturer
Fairchild Semiconductor
Datasheet
© 2008 Fairchild Semiconductor Corporation
FAN6300 • Rev. 1.0.3
FAN6300
Highly Integrated Quasi-Resonant Current Mode
PWM Controller
Features
Applications
Ordering Information
Part Number
FAN6300SY
FAN6300DY
For Fairchild’s definition of “green” Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
High-Voltage Startup
Quasi-Resonant Operation
Cycle-by-Cycle Current Limiting
Peak-Current-Mode Control
Leading-Edge Blanking
Internal Minimum t
Internal 2ms Soft-Start
Over-Power Compensation
GATE Output Maximum Voltage
Auto-Recovery Short-Circuit Protection (FB Pin)
Auto-Recovery Open-Loop Protection (FB Pin)
VDD Pin & Output Voltage (DET Pin) OVP Latched
AC/DC NB Adapters
Open-Frame SMPS
Temperature Range
OFF
-40 to +105°C
-40 to +105°C
Operating
Eco Status
Green
Green
Description
The
provides several features to enhance the performance
of flyback converters. A built-in HV startup circuit can
provide more startup current to reduce the startup time
of the controller. Once the V
turn-on threshold voltage, the HV startup function is
disabled immediately to improve power consumption.
An internal valley voltage detector ensures the power
system operates at Quasi-Resonant operation in wide-
range line voltage and any load conditions and reduces
switching loss to minimize switching voltage on drain of
power MOSFET.
To minimize standby power consumption and light-load
efficiency, a proprietary green-mode function provides
off-time modulation to decrease switching frequency
and perform extended valley voltage switching to keep
to a minimum switching voltage.
FAN6300 controller also provides many protection
functions. Pulse-by-pulse current limiting ensures the
fixed peak current limit level, even when a short circuit
occurs. Once an open-circuit failure occurs in the
feedback loop, the internal protection circuit disables
PWM output immediately. As long as V
the turn-off threshold voltage, controller also disables
PWM output. The gate output is clamped at 18V to
protect the power MOS from high gate-source voltage
conditions. The minimum t
system frequency from being too high. If the DET pin
reaches OVP, internal OTP is triggered, and the power
system enters latch-mode until AC power is removed.
FAN6300 controller is available in 8-pin SOP and DIP
packages.
8-Lead, Small Out-line Package
8-Lead, Dual In-line Package
highly
Package
integrated
(SOP)
(DIP)
FAN6300
OFF
DD
time limit prevents the
voltage exceeds the
Packing Method
PWM controller
Tape & Reel
DD
October 2008
www.fairchildsemi.com
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FAN6300DY Summary of contents

Page 1

... AC/DC NB Adapters Open-Frame SMPS Ordering Information Operating Part Number Temperature Range FAN6300SY -40 to +105°C FAN6300DY -40 to +105°C For Fairchild’s definition of “green” Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. © 2008 Fairchild Semiconductor Corporation FAN6300 • Rev. 1.0.3 Description The highly ...

Page 2

... Compensation I t OFF-MIN (8µs/38µ DET OFF S/H Blanking (4µs) 2.5V 1 DET 0. DET © 2008 Fairchild Semiconductor Corporation FAN6300 • Rev. 1.0.3 Figure 1. Typical Application HV 8 OVP I HV 27V Latched OLP Timer 55ms 500µs 30µs Starter PWM Current Limit DET ...

Page 3

... The input impedance of this pin is a 5kΩ equivalent resistance. A 1/3 attenuator connected between the FB and the PWM circuit is used for the loop gain attenuation. FAN6300 performs an open-loop protection once the FB voltage is higher than a threshold voltage (around 4.2V) more than 55ms. © 2008 Fairchild Semiconductor Corporation FAN6300 • Rev. 1.0.3 : Fairchild logo Z: ...

Page 4

... Power supply. The threshold voltages for startup and turn-off are 16V and 10V. The startup 6 VDD current is less than 20µA and the operating current is lower than 4.5mA connect High-voltage startup. © 2008 Fairchild Semiconductor Corporation FAN6300 • Rev. 1.0.3 4 and DD www.fairchildsemi.com ...

Page 5

... The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol T Operating Ambient Temperature A © 2008 Fairchild Semiconductor Corporation FAN6300 • Rev. 1.0.3 Parameter Parameter 5 Min. Max. ...

Page 6

... Maximum Source Current DET-SOURCE V Upper Clamp Voltage DET-HIGH V Lower Clamp Voltage DET-LOW Leading-Edge Blanking Time for DET- t OFF-BNK OVP, PWM MOS Turns Off Note: 3. Guaranteed by design. © 2008 Fairchild Semiconductor Corporation FAN6300 • Rev. 1.0.3 Conditions 0V< V < DD-ON GATE Open V =15V, f =60KHz =2nF ...

Page 7

... Cycle-by-Cycle Current Limit V LIMIT Threshold Voltage V Slope Compensation SLOPE Leading Edge Blanking Time t BNK (MOS Turns On Camped High Voltage CS Delay Time CS-H © 2008 Fairchild Semiconductor Corporation FAN6300 • Rev. 1.0.3 (Continued) Conditions V ≧ Hysteresis FB V < > ...

Page 8

... Temperature℃ Figure 9. Operating Current 1.0 0.8 0.6 0.4 0.2 0.0 -40 -25 - Temperature℃ Figure 11. Leakage Current After Startup © 2008 Fairchild Semiconductor Corporation FAN6300 • Rev. 1.0.3 = 25°C. A 10.5 10.3 10.1 9.9 9.7 9 110 125 Figure 6. PWM Off Threshold Voltage ...

Page 9

... Temperature℃ Figure 13. Comparator Reference Voltage -40 -25 - Temperature℃ Figure 15. Minimum Off Time (V © 2008 Fairchild Semiconductor Corporation FAN6300 • Rev. 1.0.3 = 25°C. A 9.0 8.5 8.0 7.5 7 110 125 Figure 14. Minimum Off Time (V 600 575 550 525 500 ...

Page 10

... OFF system frequency being too high. Figure 18 shows a typical drain voltage waveform with first valley switching. Figure 18. First Valley Switching © 2008 Fairchild Semiconductor Corporation FAN6300 • Rev. 1.0.3 Green-Mode Operation The proprietary green-mode function provides off-time modulation to linearly decrease the switching frequency under light-load conditions ...

Page 11

... This results in a lower current limit at high-line inputs than low-line inputs. At fixed-load condition, the CS limit is higher when the value of R also affects the H/L line constant power limit. Figure 22. H/L Line Constant Power Limit Compensated by DET Pin © 2008 Fairchild Semiconductor Corporation FAN6300 • Rev. 1.0.3 V Over-Voltage Protection DD V ...

Page 12

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’ ...

Page 13

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’ ...

Page 14

... Fairchild Semiconductor Corporation FAN6300 • Rev. 1.0.3 14 www.fairchildsemi.com ...

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