AD9517-1 Analog Devices, Inc., AD9517-1 Datasheet - Page 9

AD9517-1

Manufacturer Part Number

AD9517-1

Description

12-output Clock Generator With Integrated 2.5 Ghz Vco

Manufacturer

Analog Devices, Inc.

Datasheet

1.AD9517-1.pdf (80 pages)

Current page: 9 of 80
Download datasheet (2Mb)

Parameter

CLK-TO-CMOS ADDITIVE PHASE NOISE

CLOCK OUTPUT ABSOLUTE PHASE NOISE (INTERNAL VCO USED)

Table 7.

Parameter

LVPECL ABSOLUTE PHASE NOISE

CLK = 1.6 GHz, OUTPUT = 400 MHz

Divider = 4

CLK = 1 GHz, OUTPUT = 250 MHz

Divider = 4

CLK = 1 GHz, OUTPUT = 50 MHz

Divider = 20

VCO = 2.65 GHz; OUTPUT = 2.65 GHz

VCO = 2.475 GHz; OUTPUT = 2.475 GHz

@ 10 Hz Offset

@ 100 Hz Offset

@ 1 kHz Offset

@ 10 kHz Offset

@ 100 kHz Offset

@ 1 MHz Offset

>10 MHz Offset

@ 10 Hz Offset

@ 100 Hz Offset

@ 1 kHz Offset

@ 10 kHz Offset

@ 100 kHz Offset

@ 1 MHz Offset

>10 MHz Offset

@ 10 Hz Offset

@ 100 Hz Offset

@ 1 kHz Offset

@ 10 kHz Offset

@ 100 kHz Offset

@ 1 MHz Offset

>10 MHz Offset

@ 1 kHz Offset

@ 10 kHz Offset

@ 100 kHz Offset

@ 1 MHz Offset

@ 10 MHz Offset

@ 40 MHz Offset

@ 1 kHz Offset

@ 10 kHz Offset

@ 100 kHz Offset

@ 1 MHz Offset

@ 10 MHz Offset

@ 40 MHz Offset

Min

Rev. 0 | Page 9 of 80

Typ

−46

−76

−104

−123

−140

−146

−47

−77

−105

−124

−141

−146

Typ

−114

−122

−132

−140

−146

−150

−155

−110

−120

−127

−136

−144

−147

−154

−124

−134

−142

−151

−157

−160

−163

Max

Unit

dBc/Hz

Test Conditions/Comments

Internal VCO; direct to LVPECL output

Test Conditions/Comments

Input slew rate > 1 V/ns

Distribution section only; does not

include PLL and VCO

Input slew rate > 1 V/ns

AD9517-1

AD9517-1 Analog Devices, Inc., AD9517-1 Datasheet - Page 9

AD9517-1

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