74VHC175MTC Fairchild Semiconductor, 74VHC175MTC Datasheet

IC FLIP FLOP QUAD D TYPE 16TSSOP

74VHC175MTC

Manufacturer Part Number
74VHC175MTC
Description
IC FLIP FLOP QUAD D TYPE 16TSSOP
Manufacturer
Fairchild Semiconductor
Series
74VHCr
Type
D-Type Busr
Datasheet

Specifications of 74VHC175MTC

Function
Master Reset
Output Type
Differential
Number Of Elements
1
Number Of Bits Per Element
4
Frequency - Clock
210MHz
Delay Time - Propagation
4.9ns
Trigger Type
Positive Edge
Current - Output High, Low
8mA, 8mA
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Number Of Circuits
4
Logic Family
74VHC
Logic Type
D-Type Flip-Flop
Polarity
Inverting/Non-Inverting
Input Type
Single-Ended
Propagation Delay Time
15 ns
High Level Output Current
- 8 mA
Low Level Output Current
8 mA
Supply Voltage (max)
5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Supply Voltage (min)
2 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74VHC175MTCX
Manufacturer:
TYCO
Quantity:
7
Part Number:
74VHC175MTCX
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
©1993 Fairchild Semiconductor Corporation
74VHC175 Rev. 1.2
74VHC175
Quad D-Type Flip-Flop
Features
Ordering Information
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the
ordering number.
Connection Diagram
74VHC175M
74VHC175SJ
74VHC175MTC
Order Number
High Speed: f
Low power dissipation: I
High noise immunity: V
Power down protection is provided on all inputs
Low noise: V
Pin and function compatible with 74HC175
OLP
MAX
= 0.8V (Max.)
= 210MHz (Typ.) at V
Package
Number
MTC16
M16A
M16D
NIH
CC
= V
= 4µA (Max.) at T
NIL
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
= 28% V
CC
CC
= 5V
A
(Min.)
= 25°C
General Description
The VHC175 is an advanced high-speed CMOS device
fabricated with silicon gate CMOS technology. It
achieves the high-speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low
power dissipation.
The VHC175 is a high-speed quad D-type flip-flop. The
device is useful for general flip-flop requirements where
clock and clear inputs are common. The information on
the D inputs is stored during the LOW-to-HIGH clock
transition. Both true and complemented outputs of each
flip-flop are provided. A Master Reset input resets all flip-
flops, independent of the Clock or D inputs, when LOW.
An input protection circuit insures that 0V to 7V can be
applied to the input pins without regard to the supply
voltage. This device can be used to interface 5V to 3V
systems and two supply systems such as battery
backup. This circuit prevents device destruction due to
mismatched supply and input voltages.
Pin Description
D
CP
MR
Q
Q
0
0
0
Package Description
–D
–Q
–Q
Pin Names
3
3
3
Data Inputs
Clock Pulse Input
Master Reset Input
True Outputs
Complement Outputs
Description
www.fairchildsemi.com
May 2007
tm

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74VHC175MTC Summary of contents

Page 1

... Ordering Information Package Order Number Number 74VHC175M M16A 74VHC175SJ M16D 74VHC175MTC MTC16 Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering number. Connection Diagram ©1993 Fairchild Semiconductor Corporation 74VHC175 Rev. 1.2 General Description ...

Page 2

... IEEE/IEC Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. ©1993 Fairchild Semiconductor Corporation 74VHC175 Rev. 1.2 Functional Description The VHC175 consists of four edge-triggered D flip-flops with individual D inputs and Q and Q outputs. The Clock and Master Reset are common ...

Page 3

... Operating Temperature OPR Input Rise and Fall Time 3.3V ± 0. 5.0V ± 0. Note: 1. Unused inputs must be held HIGH or LOW. They may not float. ©1993 Fairchild Semiconductor Corporation 74VHC175 Rev. 1.2 Parameter (1) Parameter 3 Rating –0.5V to +7.0V –0.5V to +7.0V –0. 0.5V CC –20mA ±20mA ±25mA ± ...

Page 4

... OL (2) V Quiet Output Minimum OLV Dynamic V OL (2) V Minimum HIGH Level Dynamic IHD Input Voltage (2) V Maximum LOW Level Dynamic ILD Input Voltage Note: 2. Parameter guaranteed by design. ©1993 Fairchild Semiconductor Corporation 74VHC175 Rev. 1.2 (V) Conditions Min. 1.50 0 –50µ 1 2.9 4.4 = – ...

Page 5

... W t (L) Minimum Pulse Width (MR Minimum Setup Time ( Minimum Hold Time ( Minimum Removal Time (MR) REC Note 3.3 ± 0.3V or 5.0 ± 0.5V CC ©1993 Fairchild Semiconductor Corporation 74VHC175 Rev. 1.2 V (V) Conditions CC = 15pF 3.3 ± 0 50pF 15pF 5.0 ± 0 50pF 15pF 3.3 ± ...

Page 6

... Physical Dimensions Dimensions are in millimeters unless otherwise noted. Figure 1. 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow ©1993 Fairchild Semiconductor Corporation 74VHC175 Rev. 1.2 Package Number M16A 6 www.fairchildsemi.com ...

Page 7

... Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 2. 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide ©1993 Fairchild Semiconductor Corporation 74VHC175 Rev. 1.2 Package Number M16D 7 www.fairchildsemi.com ...

Page 8

... Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. 5.00±0.10 4.55 0.11 MTC16rev4 Figure 3. 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide ©1993 Fairchild Semiconductor Corporation 74VHC175 Rev. 1.2 0.65 4.4±0.1 1.45 Package Number MTC16 8 5.90 4 ...

Page 9

... TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks. ® ACEx Across the board. Around the world.™ ActiveArray™ Bottomless™ Build it Now™ CoolFET™ CROSSVOLT™ ...

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